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op amp phase measurement in cadence

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Old Nick

Old Nick

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Hi,

I designed an unity gain buffer (op amp with feedback) a while ago and it works fine.

I'm currently writing up my PhD thesis, and I can't remember how to do the sim to get a plot of the phase.

I seem to remember that I corrected for offset at the input (somehow - maybe put a DC source in series) and performed an open loop simulation - but I can't figure out how I did it. I'm a bit short of time just now (deadline is Monday) - I can ask somebody tomorrow but I need this tonight.

can anyone help?

Cheers,

Nick
 

You can do the simulation with closed loop DC feedback. What I do is to connect AC source 1V to INP, connect to OUT some load capacitance which emulates application load capacitance plus capacitance of input transistor of negative input, after that I connect in series VCVS (voltage controled voltage source) with Gain=1, after that connect in series 1 GigaOhm resistor, on second pin of resistor I connect 1F capacitor to GND and VCVS with Gain=1. Output of second VCVS is connected to INN.
Observe your open loop gain and phase on node OUT.
 

    Old Nick

    Old Nick

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tyanata said:
... connect in series 1 GigaOhm resistor, on second pin of resistor I connect 1F capacitor to GND ...
Click to expand...
Doesn't this take an awful lot of time (~1e9 seconds) to settle the INN bias?
 

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