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Should I solder Exposed Pad to the ground plane?

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elf61

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hi
some of ICs like AD9858 (DDS) from Analog Device have an EPAD (Exposed Pad) on bottom of them. Should this pad soldered to ground plane or a connection without soldering is sufficient?
 

exposed pad

it should be soldered , if u look in the stencil , recomendation , u will see theere are cutsin it , to allow solder paste , to be in the Slug

khouly
 

    elf61

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the grounds for grounding topics

kouly:
it should be soldered , if u look in the stencil , recomendation , u will see theere are cutsin it , to allow solder paste , to be in the Slug
but in ad9858 datasheet:
EPAD (thermal slug) must be attached to ground plane for some other large metal mass for thermal transfer. Failure to do so may cause excessive die temperature rise and damage to the device.

pls explain.
 

Re: Exposed Pad [hlp]

this is used as a heat sink , when the chip gets hot , the theraml engery will be transfered from the chip to the under neath ground plance by this Slug , so it should be soldered

khouly
 

    elf61

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Re: Exposed Pad [hlp]

elf61 said:
hi
some of ICs like AD9858 (DDS) from Analog Device have an EPAD (Exposed Pad) on bottom of them. Should this pad soldered to ground plane or a connection without soldering is sufficient?

If this is just a test project, you can get away with thermal transfer compound and a multiple vias ground pad underneath the device's ground pad.
 

    elf61

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Re: Exposed Pad [hlp]

another question
most EPAD be soldered to analog ground or digital ground?
 

Re: Exposed Pad [hlp]

it will depend , if this PAD in RF circuit , tie it to analog ground

this is better , and this ground shold be large area

khouly
 

    elf61

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Re: Exposed Pad [hlp]

khouly:
it will depend , if this PAD in RF circuit , tie it to analog ground

this is better , and this ground shold be large area
how can i understand that the pad is in RF or digital circuit? pls hlp. see the pg.31 of attached datasht.
 

Re: Exposed Pad [hlp]

Elf61,

It doesn't seem to me AD9858 cares too much about separating AGND & DGND if you take a look at their evaluation board's schematic. All DGND & AGND signals tie to the same GND. They don't provide the layout of the board so I can't tell. I did test some Skyworks & SkyLabs PLL Synthesizers ICs before and I don't think I did any GND plane's separation. PLL synthesizers are not anything remotely resemblance to an ADC in any shape or form so I don't think seperating ground plane is an issue.

PS: I cut and paste Dr. Howard Johnson's email newsletter below to clarify the issue of reason for ground splits. This issue have been hacked to dead in all quarters so there are plenty of treatises on Google search.

-----------------------------------------------

REASON FOR GROUND SPLITS

Elya Joffe writes with a question about grounding:

I am in the midst of writing a book on Grounding.
The book is entitled "The Grounds for Grounding" and
it will be published by IEEE Press and Wiley.

One of the central chapters in this book is that
related to grounding practices on PCBs. Of course,
we know that there is no "real" ground on PCBs, but
the issue of discussion is that of return and
reference planes, chassis planes, etc.

One of the key issues I intend to discuss there is
the issue of ADC/DAC grounding. That is not a simple
issue. [I thought] the consensus was that when mixed
A and D circuits are used on the same PCB, the best
approach for grounding practices on the PCB is to
use one SOLID and COMMON ground plane on the PCB,
and only make sure that the routing of the traces
does not lead to any conflict or crosstalk between
traces.

In your article "Multiple ADC Grounding ", I was
surprised to see that actually you recommend to use
common planes when LOW RESOLUTION ADCs are used, but
to split the planes (and to stitch to chassis) when
high-resolution devices are used.

From many discussions I have held, I found out that
in most cases, a common plane is used and
recommended.

How can this be settled? If splitting the planes is
recommended, are there any common recommendations or
"common practices" as to the grounding approach,
like tying the D ground pin of the device to the
DGND plane and A ground pin to the AGND, and whether
to bridge these grounds, not bridge them, etc....

I would appreciate your insight into this,
particularly settling the dilemma I have regarding
your previous article.

All the very best,
Elya

______________________________________________________

Dr. Johnson replies:

If you are not familiar with them already, check out
these three background articles before proceeding:

ADC Grounding (predecessor to the article you
mention)
www.sigcon.com/Pubs/edn/adcgrounding.htm

Multiple ADC Grounding (which you already
found)
www.sigcon.com/Pubs/edn/multipleadc.htm

Common-mode Ground Currents (presents a terrific
visualization of the problem)
www.sigcon.com/Pubs/news/7_02.htm

Regarding your specific question let me suggest to
you an application that would require separation of
the ground plane. Suppose you receive an audio
signal from Eric Clapton's guitar. The signal
amplitude is 100-mV p-p. Your job is to build a 24-
bit studio-quality A/D converter. One bit of
quantization noise in this converter equals 5.9 nV
(referenced to the front end). On the same card you
have a large processor that draws 10 amps.

When the processor starts and stops, DC current
from the processor surges through the ground system.
The DC resistance required to limit a current of 10
amps to a stray voltage less than 5.9 nV would be
0.59 nano-ohms. The common DC resistance shared
between the processor and analog area must be less
than this value. If you figure out how to make this
work on one card with a shared ground plane
(perfectly square, no cuts or jumps), please write
to me and tell me how.

Even with only 16 bits (considered inadequate for
high-fidelity audio) you would need a common
impedance coupling of less than 0.152 micro-ohms, a
level I claim may still be unattainable.

At 8 bits, you can get by with 39 micro-ohms. The
end-to-end resistance of a 10x10 inch hunk of
copper, 0.0013 in. thick, is .0005 ohms, at least in
the right ballpark, although 10x too high. You might
separate the input signal amplifier from the
processor and arrange the power connections so that
all the DC current doesn't plow straight through the
analog area. Ground the input stage with a screw to
the chassis right near the point where the signal
comes in. Now your circuit is susceptible only to
the small voltage developed across the ground plane
between the screw and the reference terminal of your
input amplifier. You can get this to work.

Henry Ott's book, "Noise Reduction Techniques in
Electronic Systems", goes into a lot of detail about
these sorts of common-impedance coupling problems.
It is a fast read, and it will kick-start your
understanding of noise-coupling effects. If you do
not have his book, get it.

I fully appreciate the pressures of book
publication, and hope that you are able to complete
your project successfully.

Best Regards,
Dr. Howard Johnson
 

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