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hi all,
i have tried by using matlab;s FDA tools for generating VHDL code however, it isn't compatible with ALTERA quartus..
it shows various error..
Have you guys heard there is another software call OneOverT by tyder. ltd it is a powerful tools which can generate VHDL code by filter response..
wish to hear from you guys soon
Actually I tried to download system generator but there was a problem. So, could you guys suggest another software? Or, can we directly use Matlab only without having to use additional software?
What went wrong with your System Generator download? You need to login before downloading demos, but registration is free.
Those two MATLAB HDL Coders are already included on the MATLAB installation disks. To install them you need the product license codes from MathWorks. Or maybe you can download demo versions: https://www.mathworks.com/web_downloads/download_trials.html
avr_guru, I think you posted your question to the wrong place!
Hi rectifier
The problem is not in the generated code bcos i have done it and is working fine.
I am using Xilinx 7.1i.
The problem may be bcos the FPGA tool u r using is an older version.
try downloading a newer version of any fpga tool and try it should work
is it the $signed error???if verilog
VHDL should work fine
remember as echo told u might have done simple mistakes.
try this
fdatool
design the filter
quantize it to no of bits u want(16 in 16 out by default)
targets-->generate hdl
select VHDL(by default)
it should work
have you try the matlab to generated VHDL code and successfully implement to ALTERA devices?
coz it is multiple error and i attach the code for you to see..
the code i have attached can you help me to synthesize by quartus..
Hi lawrence_idol, your VHDL filter contains floating-point arithmetic. That won't synthesize with any _Altera or Xilinx tools. You must tell MATLAB's fdatool to generate integer fixed-point arithmetic. Look for a "quantization parameters" button.
really thanks for your rapid reply. i really appreciate that..
i would try to synthesize by your comment..
do you have any research paper/ study regarding to fix point and floating point arithmetic??
i would be great to have that for me..
thx
best regards always.
Google finds a huge number of hits. Near the top I see a paper that could be a helpful introduction:
"Migrating Signal Processing Applications From Floating-Point to Fixed-Point" by Barberis and Shah: **broken link removed**
Also try searching MATLAB's and Altera's web sites for similar keywords. You will probably find helpful application notes.
hi lawrence
as echo told u should quantize it before u generate HDL.just follow the steps i told u.
one more thing ur filter is of order 51 so it has 50 mul's and 50 add's
make sure ur FPGA supports it.pls do let me know the efiiciency of the code cos i am using verilog and we can get a comparison of which is better.
regarding float to fixed see fdatoolbox and filter design hdl coder user guide they are good concerned with filters only
I have been given the task of converting MATLAB code to FPGA using AccelDSP.
So far not much progress has been made. The expectation is that anything that can be written in MATLAB can be converted i.e state machines, function(sine wave) generators etc.
I am thinking that only a small subset is synthesizable if it of the form: signal samples in ->some function-> converted samples out (i.e. a filter!)
Does anyone know if anything other than functions on digital signals is possible.
Thanks for the solution both u guys providing.. it really helps..
the VHDL code which generate from matlab is synthesizable by ALTERA quartus 2, however, it has more than 512 warning of the Fann in problem for just a minimal 4th order FIR equiripple low pass filter
and the total LE usage is 21% of FLEX 10K which i dont know is efficiency or not...
do you guys know how to design a FIR filter manually by just designing a simple FIR block diagram and manually convert into VHDL programming then download to the target device and run it..
i wonder wat outcome it would be, and the problem we facing?
thanks
and wish to hear for you guys soon
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