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A short question on LEF

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steven852

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cadence lef file

Hi,

I am using SoC Encounter which requires LEF as one of its inputs. Since I have a LEF file from other project, can I use the same LEF file for the new project? Does this depend on the process (0.13 or 0.25) or library? Under what cases a LEF can be reused?

Thanks
 

cadence lef format

hi,

if i am not wrong u might be specifying the lef file from DTMF design to other designs, if u open that lef file of DTMF u will get ur answer....


that DTMF lef file clearly says u cant use that tech file to any other design as its just a tutorial and not any design specific file...


thanks,
Prasad
 

tech.lef

Hi,
LEF stands for Library Exchange Format and contains just the technology part(or std cell lib description) so it's not design dependent.

See ya
Politicante
 

lef format

i believe that LEF can contain physical information of any macros present in your design. in this case, dtmf, it contains the ram info in it. my point is, if steven852's design is going to contain any memory modules in it, it might not be enuf to use the DTMF lef.
 

technology lef file and std cell lef

LEF is technology dependent file. It defines the layer, the metal width, space, pitch and via size. All std cell in lef is designed by that design rule. So you can not immigrate the lef from .25 to .18. Even if the same process with different foundaries.
But if you have technology design rule file. You can manually write the LEF file in technology part (layer, metal and via). For std cell, you can try to previous lef in new project. And then to see if there are some DRC errors.

But in most case, you can not reuse LEF file in new project, except the same technology.
 

lef file description

There is an interesting point in your post: how to manually write a LEF file? I know there are C-API but it requires special licence for the header files. Except the C library way, is there any others?

Thanks
 

design +lef technologie

LEF means?.. Either Logical Effort File or Library Exchange Format?...
 

technology lef file

its library exchange format.

i always wanted to know how to create our own lef file. i know there is a lef/def reference manual, but i've not come across any software or API which will develop a lef manual based on our inputs.

if somebody knows about one or if somebody can definitely say that there is none also, please let me know.
 

site:edaboard.com def + lef

LEF cannot be reused as it is tech and Design depndent.
I say "Design dependent" because LEF also contains the position of pins in the design (Stan cells or the I/O pads), which might change from a particular library to the other.
 

lef header

is it .plef and .vclef are vendor specific LEF format? what the different between them with the cadence LEF?
 

asic design lef format

In response to cmos_dude, sometimes the lef is divided into two files, one is called techfile that contains global information like layers with thickness, width, pitch, caps per unit area ...etc. and the other contains library cell specific information of std cells and IOs like pinplacement, metal geometry inside cells..etc.
The advanatage is that multiple libraries can be defined for the same process (like low power, high speed ..etc). using the same tech file but different lefs for libraries. Hope this helps
 
lef files eda

I know this last post was fairly old but maybe someone could clarify what he said. I have a techfile that is just a file and then I have a techfile that is a folder. Is this my substitute for not having a lef file?
We have the TSMC .35u PDK from Mosis if that helps.

Thank you.
 

lef plef cadence

I have always had our EDA group to develop LEF files for me. As far as editing one, I always used one of the best EDA tools available to an engineer... "VI"

:D

A note of caution on editing LEF files, if you do not know what you are doing, better not touch it and if you do touch it make sure the library manager can verify that yoru edits are OK. Otherwise you could run into interesting problems :D
 

mar via in cadence technology lef

ch1pz, you need a LEF file and a Tech LEF file to implement a design.
There are tools to generate LEF files, like Cadence Abstract.
 

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