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CMOS Bandgap: Effect of BJT's low 'beta' and high base res?

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ipsc

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cmos bandgap beta

can anybody please upload a paper/book/link which gives an analytical account of, "effect of BJT's low current gain and high base resistance" on reference voltage of a CMOS bandgap?

even some qualitative explanation aslo very much appreciated.

Thanks
 

Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

with low beta, the emitter and collector current would not be the "same" since some current goes into the base. be careful when the current you are using in your current mirrors is small....
 
Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

In a CMOS process we generally use PNP transistors with collector and base connected to ground i.e. we are concened only with Ie, right? It's not clear to me, then how will this Ie≠Ic will affect bandgap performance. Can you please through some light on this?

Thanks
 
Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

we derive bandgap formula from ic and current supply , and assumption ib=0
but when beta is samll and low current supply --> larger current will flow through ib
formula has some broken
you can look razavi's book chapter 11
 

Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

Hi chungming,

in razavi the formula is derived for bipolar technology NPN BJTs, with collector, base shorted and emitter connected to ground and saying Ic=Is e^(Vbe/Vt).
Actually Ie= Is e^(Vbe/Vt) and not Ic. But in this case as β is large it is alright to wtite Ic=Is e^(Vbe/Vt). And there might be a problem with this if you use an NPN with low β , as you said, because ΔVbe depends on Ic.

When we are using PNP, I think, it should not matter whether Ie=Ic or not i.e. β is large or not, because all we need is a PTAT=ΔVbe and Vbe depends only on Ie in this case.

point me if i am wrong.

Regards
 

Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

ipsc said:
Hi chungming,

in razavi the formula is derived for bipolar technology NPN BJTs, with collector, base shorted and emitter connected to ground and saying Ic=Is e^(Vbe/Vt).
Actually Ie= Is e^(Vbe/Vt) and not Ic. But in this case as β is large it is alright to wtite Ic=Is e^(Vbe/Vt). And there might be a problem with this if you use an NPN with low β , as you said, because ΔVbe depends on Ic.

When we are using PNP, I think, it should not matter whether Ie=Ic or not i.e. β is large or not, because all we need is a PTAT=ΔVbe and Vbe depends only on Ie in this case.

point me if i am wrong.

Regards


why you said "Actually Ie= Is e^(Vbe/Vt) and not Ic" ?
Ic = Is e^(Vbe/Vt) = α Ie
and even in PNP Ie = Ic + Ib
 

Re:CMOS Bandgap: Effect of BJT's low 'beta' and high base re

why you said "Actually Ie= Is e^(Vbe/Vt) and not Ic" ?
Ic = Is e^(Vbe/Vt) = α Ie
and even in PNP Ie = Ic + Ib

Ic=α Ie, Ie is the current of forward baised emitter diode. And you know the current of a diode is given by "Is*e^(Vd/Vt). It can also be observed that, we are writing 'Vbe', in Ie/Ic equation, in place of 'Vd' for the same reason.

Hope I am able to make my point clear.

Regards
 

Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

The best case will be that you have a high beta transistor with a high knee current. In that way, you will have high gain and your BJT can work very well. Low beta just means that you gain is small and the emitter and collector current will not be the same. Having a low beta often is the case for lateral BJT.:D
 

Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

Hello

To me, seems ipsc is making his point.
From device physics, PNP BJT major operation mode is
when hole current gets injected into N-type base region,
most of them diffuse into collector.
What we have here for CMOS parasitic BJT, is big base width
and no bais voltage between base and collector,
then most minority carrier (hole) in base gets recombined and
turn into electron current out of base.

In this case, base resistnace's role gets no negligible,
(so BJT model become important)
But how does that affect VBG statistics,
we need some literature reference or experience from senior engr.
 

Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

Hi!

I agree with ipsc. And for me, using NPN or PNP devices in on BGR, I can not see why low beta can damage the temperature performance.
Could someone give an analytical explication?

Thank you very much,
Palmeiras
 

In typical cmos technology, vertical pnp is utilized as diode, so low beta does not affect bandgap performance.
But I think base res could be a problem to deteriorate the exponential relationship of Ie and Vbe.
 

Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

Hello All,

sunbeam said:
In typical cmos technology, vertical pnp is utilized as diode, so low beta does not affect bandgap performance.
But I think base res could be a problem to deteriorate the exponential relationship of Ie and Vbe.

I am in complete agreement with 'sunbeam' because it sounds most logical/sensible. => The effect of β and Base Resistance(Rb) on VBG for a CMOS Bandgap with PNP BJT is only through Volatge drop across 'Rb'.

Now with this understanding if we look at VBG eqn for the case of:
a). Two BJT m's respectively are m=1 & m=8. (b). Currents though BJT branches are equal. (c). β and Rb are equal for both BJTs. (d). ΔVBE multification factor=10
(e). Conventional architecture.

VBG_Real=VBG+{[1+(8-1)*10/8]/(β+1)*Ie}*Rb.

Generally 'Ie α ΔVBE_Real'.

So the overall effects are:
1. An offset in VBG.
2. Addition of a +ve Temperature coefficient to Temperature coefficient of VBG.

I hope I am able to make my point clear. Please let me know your comments.

Regards
ipsc.

Added after 13 minutes:

Note that in my previous reply I assumed β of two BJTs are equal but it will never be the case because β is dependent on Ie. And Ie for m=8 BJT is 1/8 times that m=1 BJT. But this shouldn't be a major issue.

Also note that β will have -ve temperature coefficient => Our conclusion '2' becomes more valid.

Regards
ipsc.
 
Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

Thanks ipsc!

Now the explanation is clear! You got the key point of this question.
I just do not understand how you derived the equation of VBG_real. I did this deduction and I got different results. Please, if possible, take a look bellow. Could you explain how you got your equation, and if my deduction has anything wrong?

Regarding figure 1 (attached); the ideal case is:

1) VBGR_ideal = Vbe1 + I_ptat*R2

2) I_ptat=[VT*ln(N)]/R1

Where: N is the aspect ratio of Bipolar devices, VT = thermal voltage

Considering base resistor, we have:

3) VBGR_real = VBGR_ideal + I_base* Rb

4) I_base = I_emitter/(BETA+1) -- where BETA is the common-emitter current gain

5) I_emitter = I_ptat/8 -- since the I_ptat current is shared by 8 devices

Thus…

6) VBGR_real = VBGR_ideal + {I_ptat/[(BETA+1)*8]}*Rb

7) VBGR_real = VBGR_ideal + VT*ln(N)/[(BETA+1)*8]*Rb

Another question: What is deltaVBE Multiplication factor that you reffered? Is it R2/R1?

Thank you very much,

Palmeiras
 

Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

Hi All,

Let me derive eqn for VBG_Real for the fig given by palmeiras at 23 Feb 2010 22:10 with following assumptions:
(a). Two BJT m's respectively are m=1 & m=N=8. (b). β and Rb are equal for both BJTs. (c). ΔVBE multification factor=M=R2/R1=10


NOW,
VE2=VBE2+Ipt/(β+1)*Rb ............... Since I_base = Ipt/(β+1)
VE1=VBE1+(Ipt/N)/(β+1)*Rb ........... For each of N devices in Q1, I_emitter=Ipt/N

Hence,
ΔVBE_Real=ΔVBE+{[(N-1)/N]/(β+1)*Ipt}*Rb

VBG_Real=VE2+ΔVBE_Real*M

Hence,
VBG_Real=VBG+{[1+M*(N-1)/N]/(β+1)*Ipt}*Rb

For M=10 & N=8
VBG_Real =VBG+{[1+10*(8-1)/8]/(β+1)*Ie}*Rb.

So the overall effects are:
1. An offset in VBG.
2. Addition of a +ve Temperature coefficient to Temperature coefficient of VBG.


NOTES:
(i). It is assumed that β of two BJTs are equal. But it will never be the case because β is dependent on I_emitter. And I_emitter for m=N - BJT is 1/N times that of m=1 BJT. But, I guess, this shouldn't be a major issue.
(ii). β will have -ve temperature coefficient => Our conclusion '2' becomes more valid.


I hope I am able to make my point clear. Please let me know your comments.

Regards
ipsc.
 

Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

Thanks ipsc!

It is the first time that I saw a complete deduction of this impact of Rb on the performance of BGRs. I checked you calculation and I make sense. I understood how Rb resistance can severally damage the output performance. Thus, the last question that appears from our discussion is:

What can we do to avoid this effect, and design BGRs with good Temp. Coefficient? I also posted this question in my topic.

In the Standard CMOS process, often (or always) the value of BETA for PNP devices is low (e. g. BETA = 1 or 2). However, I have designed many BGRs using the parasitic BJTs and these references worked perfectly; that is, temperature performance was around 25 ppm/C. In the most part of IEEE papers, they also present traditional BGRs working perfectly with parasitic devices with beta equal to 1 or 2.

How does these references work perfectly? I dont know why.

Is it always possible to compensate effects of base resistance, if I change the value of the multiplication factor (R2/R1)?

Thanks again,
Palmeiras
 

Re: CMOS Bandgap: Effect of BJT's low 'beta' and high base r

if we use the BJT like a diode why not use the pure diode?
 

Hi alchen77,

Of course you can use pure diode. But the point is that these devices may not be available in common digital (or even Analog) CMOS Process. So, you are forced to use the parasitic BJT (lateral or vertical).
Moreover, you can also use the parasitic diode (not vertical or lateral) presented in the mosfet, in case you dont have vertical or lateral BJT available in your library.
 

The older version of Gray & Meyer had some stuff about
this, it was more bipolar-linear oriented.

The BJT beta idealizes the diode characteristic and
first order eliminates a lot of the series resistance
(net) while running higher current density. This is
less true, the lower beta goes, and variably true to
the extent that beta varies with temperature,
process and current density. Because the bandgap
operates on the principle of constant slope of "Vbe"
(or log Vbe) vs current density, you want a range
of current density where transistor / diode behavior
makes this approximately true. Low current idealities
place a lower bound (limiting your "low power"
aspirations for a given accuracy across the envelope)
and series resistances, an upper.

Base resistance is often the dominant term in curvature
for bipolar bandgaps.
 
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