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bias voltage of the feedback amplifier

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noiseless

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For the close loop amplifer, if resistors are used in the feedback path, the close loop gain is R2/R1. However, when capacitor is used to isolate the amplifer with previous stage, how can I bias the input stage transistor? (the circuit is single supply voltage). Because the output DC voltage will bias the input stage transistor through the feedback resistor because of the voltage divider. The amplifier is differential input and differential output.
 

hi
capacitor is used to avoid the loading of next stage on first stage. finding the dc operating points of amplifier is done as if the next stage is not present. These capacitors donot allow dc current but maintain the dc voltages across them.

i hope this answers to your Q. if i misinterpreted...requestion!

regards
 

noiseless,

if you want to use capacitors in the feedback network, you will need to include switches also. Using switches, you can bias the gate of the input stage transistor.

You should read page 413 of Grey, Hurst, Lewis, and Meyer. There is a diagram there.

Here is another picture:
**broken link removed**

The idea is that during Phase 1, you bias the input gate to some voltage by closing a switch. Usually you try to bias both input gates to approximately the same voltage.

In phase 2, you move the charge that you sampled onto the input capacitor onto the feedback capacitor.

You should read this... a bit long, but very informative.

**broken link removed**

see diagrams on page 24.

good luck!
 

Appreciae guys.

However, I do not want to use capacitors as feedback items. The reason is it is variable gain amplifier and its gain variable range is very large. I cannot use capacitors to realize it.
 

Dear noiseless,

It is very simple. when a cap is used for DC block of a preceeding stage,people tend to use a simple resistive or a diode based voltage divider to rebias the next stage.

I have used this implementation for a power amplifier for an audio circuit. the only limitation is the area, power consumption. Hence go for transistors which are diode connected. In case, you a better PSRR, then go in for constant gm circuit and then raise the required bias from that. If you are working on a SoC, you will have a Vref somewhere, you can actually generated the required bias for that

I hope it helps
 

Mocherla,

I know your method is similar to the open loop method. However, what I want to do is using feedback method. So the thing is different.
 

Dear Noiseless,

Do you mean that you want to establish the DC biasing condition from the output to input?I think that it is not right. In fact, the resistor in the feedback is to establish a output bias from the input for SE configuration. But for diferrential configuration, the CMFB circuit should take care of the output bias conditions. At the input, as long as the DC bias level in the Common Mode range, the outputs can also be maintained at any bais. I hope that I am clear
 

Dear Mocherla,

My meaning is
1. I'd like to use resistor realize feedback
2. I do not want the output bias condition affect input stage bias condition

How can I do it?

Appreciate
 

Dear Noiseless,

In a differential configuration, the VOCM, which is the reference for O/P CM programs the Output CM Level. The input level can be given at any level, which due to the virtual ground will have its own level.

Importantly, since there is a virtual ground at the input, the difference in the CM Levels of the input and output will cause equal and opposite currents in along the input currents and effectively cause a zero voltage change. So, as far as I am concerned, there should not be any problems if the VICM and VOCM levels are different.

I hope that I am clear.

Added after 3 minutes:

Dear Noiseless,

Please refer to the following link for some more insight into the problem.

www.edn.com/article/CA84302.html
 

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    noiseless

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