Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

type II PLL phase margin definition

Status
Not open for further replies.
N

neoflash

Advanced Member level 1
Joined
Jul 2, 2005
Messages
492
Helped
10
Reputation
20
Reaction score
2
Trophy points
1,298
Activity points
4,759
phase margin definition

Rolland Best's PLL book define PLL's phase margin as the phase margin when the loop gain = 0dB.

However, we all remember that when we are design op-amp, we should measure the minimum phase margin when the gain is positive than 0dB. Which way is correct?

Another related question is that type II PLL (PFD + charge pump). There are two poles located at origin "0". Thus the phase shift in low frequency is close to 0degree. How we understand this phenomenon?

Transient response is the final answer. However, I still want to build a bridge between time domain and frequency domain in this topic.

thanks
 

definition of the controling margin

neoflash said:
However, we all remember that when we are design op-amp, we should measure the minimum phase margin when the gain is positive than 0dB.
Click to expand...

Are you sure?
 

type ii pll

That is how we did during work. Any problem?

Welcome for your inputs!
 

phase margin & greater than 180

The phase margin definition is the difference between 180 (degree) and the phase at unity gain (0dB).

So there is no conflict between both definitions
 

phase wrapping pll

I've been trying to wrap my head around PLL loop design as well and ran into the same problem. When you are talking about PLL transfer functions and phase magins you are working with a linearized frequency domain model for a closed loop system. So when you are talking about phases in this context it is not the same thing as the output phase of the PLL.

Another thing that sometimes messed me up was that in a control system context the phase margin is calculated on an open loop transfer function. Be careful not to try and apply these methods to a closed loop transfer function or you'll run into problems.

Nino
 

nyquist good gain margin and phase margin

nzahirov said:
I've been trying to wrap my head around PLL loop design as well and ran into the same problem. When you are talking about PLL transfer functions and phase magins you are working with a linearized frequency domain model for a closed loop system. So when you are talking about phases in this context it is not the same thing as the output phase of the PLL.

Another thing that sometimes messed me up was that in a control system context the phase margin is calculated on an open loop transfer function. Be careful not to try and apply these methods to a closed loop transfer function or you'll run into problems.

Nino
Click to expand...

Nino:

1. Phase we are talking about here is the phase shift of the signal being transfered in the PLL loop. It could be excess phase actually.

2. Phase margin is always calculated on open-loop gain.

Added after 3 minutes:

eng_Semi said:
The phase margin definition is the difference between 180 (degree) and the phase at unity gain (0dB).

So there is no conflict between both definitions
Click to expand...

The difference is that if there is 180 degree phase shift, when the gain is still 30db.
However, the phase shift go back to 145degree when the gain is 0dB.

Can we say the system is stable?
 

type i pll

neoflash said:
The difference is that if there is 180 degree phase shift, when the gain is still 30db. However, the phase shift go back to 145degree when the gain is 0dB.
Can we say the system is stable?
Click to expand...

Can u send a snapshot for the open loop gain and its phase ??
 

definition of gain margin and phase margin

If I recall correctly this problem can best be approached from the Nyquist criterion for closed loop stability and the Principle of the Argument from complex numbers. It has to do with the number of encirclements of the critical point (-1) when doing a transformation from frequency to the complex domain (Re(H(jw)) vs Im(H(jw)).

Since a 180 degree phase shift from the positive Real axis lands you on the negative Real axis you have to watch for encriclements around -1. This will occur if you phase is greater than 180 at the 0dB (it implies a crossing of the Real axis to the right of -1). However, if you have a system that has a phase that goes beyond 180 degrees but comes back before 0dB then you are not encircling the critical point but rather moving past the Real axis and then coming back again to the left of the critical point.

So you're system remains stable. I hope this makes sense. It's tricky to describe without a picture.

Hope this helps.

Nino

Added after 1 minutes:

Oh yeah, and one more consequence is on your gain margin. If your gain isn't as you predicted in simulation you may have stability problems if it drops low enough to cause that dip in your phase plot to actually occur at 0dB.
 

    N

    neoflash

    Points: 2
    Helpful Answer Positive Rating
definition open loop transfer function

nzahirov said:
If I recall correctly this problem can best be approached from the Nyquist criterion for closed loop stability and the Principle of the Argument from complex numbers. It has to do with the number of encirclements of the critical point (-1) when doing a transformation from frequency to the complex domain (Re(H(jw)) vs Im(H(jw)).

Since a 180 degree phase shift from the positive Real axis lands you on the negative Real axis you have to watch for encriclements around -1. This will occur if you phase is greater than 180 at the 0dB (it implies a crossing of the Real axis to the right of -1). However, if you have a system that has a phase that goes beyond 180 degrees but comes back before 0dB then you are not encircling the critical point but rather moving past the Real axis and then coming back again to the left of the critical point.

So you're system remains stable. I hope this makes sense. It's tricky to describe without a picture.

Hope this helps.

Nino

Added after 1 minutes:

Oh yeah, and one more consequence is on your gain margin. If your gain isn't as you predicted in simulation you may have stability problems if it drops low enough to cause that dip in your phase plot to actually occur at 0dB.
Click to expand...


What you said does ring the bell. It is very helpful. I will go back to text book and verify it.

Many thanks. I will let you know whether I finally agree with it or not.
 

after reviewing the books, I believe that we should not use phase margin to predict settling time for complex system. The phase margin is good for simple 2nd order system, however, if there is zero and 3rd order pole, the prediction will be bad.

We still need to look at simulation.

Added after 4 minutes:

However, we still need to guarantee that system phase margin is positive in all regions.

Root locus and Nyquist curve shall be refered to as stability criterion for system other than simple 2nd order systen.
 

the following is my thought about the phase margin of type II PLL. Any point is welcome.

"A system is not stable" means the phase shift is no lower than 180 degree (i.e. negtive feedback becomes positive feedback) when the gain is no lower than 0dB.

Why we need phase margin? Because the real frequency response is never exactly what we calculate. Phase margin can guarrentee the system is always stable even if the gain or the frequency of pole/zero in real circuit is some different from the model.

Now back to type II PLL. When calculating phase margin of PLL, why we don't care the condition near 0Hz? Because we know the phase shift will always lower than 180 degree even if the real gain or the frequency of pole/zero (except the poles in 0Hz) has some deviation. So we don't need phase margin here.
 

borislee said:
the following is my thought about the phase margin of type II PLL. Any point is welcome.

"A system is not stable" means the phase shift is no lower than 180 degree (i.e. negtive feedback becomes positive feedback) when the gain is no lower than 0dB.

Why we need phase margin? Because the real frequency response is never exactly what we calculate. Phase margin can guarrentee the system is always stable even if the gain or the frequency of pole/zero in real circuit is some different from the model.

Now back to type II PLL. When calculating phase margin of PLL, why we don't care the condition near 0Hz? Because we know the phase shift will always lower than 180 degree even if the real gain or the frequency of pole/zero (except the poles in 0Hz) has some deviation. So we don't need phase margin here.
Click to expand...

It is toally wrong. Not right from the very beginning.
It might be rude to say that. But I believe it helps to approach the truth behind.
Also, I used to hold the same idea, but now i changed.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top