What are the effects of GALS on chip design?

Hello, all friends:

Who has used GALS (global asynchronous local synchronous)

concepts to design chips.

how about the effect?

Are there any difficulties.

best regards

Re: GALS

If you speek german goto:
**broken link removed**
Regards,
IanP

GALS (Global Asynchronous Local Synchronous) is a wrapper that wraps a synchronous block and provides it with a clock. Multiple GALS-elements will make the whole system. The clockfrequency may be independently adjusted between each block. The clocks may be started and halted independantly depending on the workload.

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Re: GALS

well thi is the field which am currently working under.

This GALS stands for globally asynchornousand locally synchronous desing in which there are locally clocked blocks. Here basically there are several distincly clocked domains which communicate asynchronously with each other.

there are lotsa studies goin on in this field of asynchronous communication when it comes to GALS design.

The main advantage of GALS design is that there is reduction is power consumed for executing an instrcution ( in a GALS based micro processor) over all there is reduction of power supply but the main disadvantage is the fact that there is also reduced efficiency -- speed of operation. even though the power reduces by some 12% the speed of operation drops by some 7.5% approx. --- this is for any tupical GALS design.

the main advantage of GALS processor design :-

low power norms are obeyed

good device modelling with asynchronous communicaton scheme.

but this design has to modelled carefully as synchrononization failures are much possible due to asynchronous communication.

I have proposed an idea where in this reduced speeds of operation in GALS processor can be compensated by using a super scalar architecture which is a VLIW (very long instruction word) processor design.

since this processor in co-operates Instruction level parallelsim.. and good branch prediction algorithm and various other compatible features with GALS processor we can design such a hybrid between the.. one with VLIW architecure under GALS design methodology.

if u have any doubts jes tell me ( i wud jes take a look at my thesis and give u a detailed explanation)

with regards,

Re: GALS

arunragavan said:

well thi is the field which am currently working under.

The main advantage of GALS design is that there is reduction is power consumed for executing an instrcution ( in a GALS based micro processor) over all there is reduction of power supply but the main disadvantage is the fact that there is also reduced efficiency -- speed of operation. even though the power reduces by some 12% the speed of operation drops by some 7.5% approx. --- this is for any tupical GALS design.

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I don't agree with you at this opinion. GALS in many case can increase speed of operation, performance,...

GALS means that synchronous blocks communicate asynchronously to each other in a GALS system.

Why we need GALS ?

- We want to reuse existing synchronous blocks (or IPs).
- Large systems need multi-clock domains.
- Problem of global clock (skew).
- Asynchronous design is too complex and too difficult.

==> So, GALS is the best choice !

Re: GALS

well the speed of operation reduces.. the efficinecy of operation does reduce.

one solution to that is VLIW architecture inco operated into GALS design.

yes absolutly the design reuse can be expolited to use this design in multi processor technique.

with regards,

Re: GALS

Guys,

Is there any papers or books describing GALS more detailed?

Re: GALS

yes i do... but tell me more specific which paper u want.. u want power analysis ors a general description of GALS design.?

with regards,

Re: GALS

To begin acquaint myself with GALS - general description will be more useful

Thanks