AMSA84
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Hi guys,
I am facing a problem here. You can see in the picture bellow:
I have join the drain and source of two transistor (diff. pair) in a interdigitated fashion. When I did this, cadence started to show a yellow warning.
I know that one can remove that but I don't remember how.
Does anyone knows?
Regards.
I am facing a problem here. You can see in the picture bellow:
I have join the drain and source of two transistor (diff. pair) in a interdigitated fashion. When I did this, cadence started to show a yellow warning.
I know that one can remove that but I don't remember how.
Does anyone knows?
Regards.
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