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What differences between direct form FIR and transpose FIR

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andy1

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fir direct form 1

What are the differences between these two types of implementation? Which one is faster? Which one can be pipelined so that it can be run at faster speed?
 

direct form 2 transposed

The direct form has one huge addition at the output, which maps very well to the MAC operations on a DSP processor but may be a problem if implemented in hardware.

The transposed structure has many small additions separated by delay elements. This might work better in a FPGA or ASIC implementation.

Quoting some lecture slides:

The direct form FIR filter needs extra pipeline registers between the adders to reduce the delay of the adder tree and to achieve high throughput.

The FIR filter with transposed structure has registers between the adders and can achieve high throughput without adding any extra pineline registers.

Both structures can be pipelined as much as you like, if delay isn't a problem.
 
direct form ii transposed

I can understand that in the transpose form, the multiplier section can be pipelined, but I am not sure how to pipeline the adder yet. Although there is only one adder per delay, what if you want to split the adder into two or three ... stages?
 

fir direct form transposed form

transposed form is self pipelined with the cycle period the delay of an adder and a multipiler. But it has more area than directed form. You can add delay even in directed form or transposed form to make the design faster which resulted in mixed form. But you should add delay with cut-set algorithm to maintain the correctness of the algorithm.
 

pipelining in dsp direct form 2

pipelining depends on the operation frequency of the FIR.i dont think you need to
split the adder into two or three stages if you make a transpose filter.
 

Re: fir direct form 1

What are the differences between these two types of implementation? Which one is faster? Which one can be pipelined so that it can be run at faster speed?

The difference is in the number of adders in the structure which is quite important while considering for hardware design implementaion
 

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