Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
A: The partof the graph which is not found in most high voltage parts because they rairly have rail-to-rail inputs. The low voltage, low power op-amps have two different offset voltages in some parts due to their rail-to-rail inputs. This is something to be aware of when designing a circuit.
am uploading a document.. take a look at page 12.. to understand more abt this common mode range.
hope this helps,
with regards,
/Post link instead of file. **broken link removed**
(klug)/
In an amplifier the input common mode range is the maximum voltage range that in it you input transistors remain in amplifying region (linear region for BJT and saturation for MOS transistors). In this range your device acts as a dependent current source and you can achieve voltage or current gain.
For calculation it depends on your circuit. For a simple case with an NMOS input device with PMOS load you need a minimum value of (Vgs-Vth)n or overdrive volatge for NMOS and (Vgs-Vth)p for PMOS. So you input common mode range for this case is Vdd-(Vgs-Vth)n-(Vgs-Vth)p
For more detail have look at a book I suggest Razavi's Book
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
