Urgent Help- Verilog design

Hello friends, i'm working on a wheel speed measurement circuit. I'm stuck. The algo goes like this the rotating wheel generates 8 pulses per rotation and I'm supposed to measure the speed.
What I am doing is that I took 2 counters one 4 bit and another 32 bit, both the counter starts at one time(the moment we start measuring speed) lets say for accuracy we are taking 3 rotations, so that gives us 24 pulses. Now both the counter starts at same time, the smaller one counts till it gets 24 pulses, and then sends an acknowledge signal to 32 bit to stop. We'll measure the count of 32 bit one and will latch it.

Now my issue is that the tacho wheel does not work synchronously ie it gives pulses at random so I thought of adding a synchronizer along with an edge detector, which will detect the edges from tacho wheel and will be fed into the 4 bit counter.

So what I want is that some help in synchronizer design and edge detector circuit.

For Edge detector you can use a D flip Flop. Just AND the FF o/p and inverted FF i/p. This gives you the rising edge.