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[SOLVED] Different Technologies for VLSI Design

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savan

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There are different technologies available for VLSI Design like 35nm, 50nm, 75nm, 100nm.

I am following the default Technologies of my Software Electric VLSI.

Can anybody throw some light on what diff these technologies make and all!
Thanks

I am exploring this with google but I will appreciate the views of fellow members!
Further request is it would be highly helpful it is answered considering you are answering to Dummy! ;)
 

Study the book "Digital Integrated Circuits" by Jan M Rabey. It will clear your queries. Also search "ITRS " in google and get the broad idea about process and technology. Then you can post your specific queries here. Any technology in a mere sense is the smallest vlsi structure usually Memory (DRAM) that can be built with it. Technology there are many terms that you need to acquaint yourself with, so I suggest you to start reading the book.
 
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Hi ,

I think you need to ask more specific questions -

different nm technology are used in different applications of chips -
35nm is very costly technology ....mostly used in Processor design...like intel processor etc...

I think most common technology is 90nm ....and well understood....and used in micro-controller to FPGA designs....

with regards,

milind
 
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The dimension in the technology description e.g. 35nm is the smallest 'feature size' of the technology. This is often, but not always, the smallest transistor gate length allowed.

Keith
 

usually the different technology is the different level of Packing a transistor on the semiconductor wafer.
In CMOS this corresponds to the width of the GATE terminal. i.e. what is the width of a channel.
This corresponds to "lambda" value.
 
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Something that concerned me to Ponder over the Technology was this!
All of my design on software(Electric VLSI) has been designed with MOCMOS(scale=300.0nm, foundry:MOSIS)
Does this make sense to any one of you? if yes please enlighten me!

I know that latest technology is 25nm and 35nm is its predecessor.
I presume this is not the 300nm technology I am working on. If it is that is very outdated technology I am working with!
 

dean_winchester said:
usually the different technology is the different level of Packing a transistor on the semiconductor wafer.
In CMOS this corresponds to the width of the GATE terminal. i.e. what is the width of a channel.
This corresponds to "lambda" value.
Click to expand...

It is the length of the gate not the width that is the critical minimum value.

300nm technology is not the latest, but there is no reason why all design needs to be done on the latest technology. 300nm is an unusual figure though - 350nm is more common.

Keith
 
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