Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
yes, that is right. But to maintain the gain, there is only small range of trade _off but that is meanless.
Because no matter I reduce the size of that cascode MOSfet the gm will fall down or increase the size the para cap will go up.If I increase the current the Gain will be reduced by the...
Specs;
DC gain 60dB
UGB 50MHz
PM >60
VCC 2.5V
I am working on this design and DC gain & UGB is already fulfilled the spec,but the PM is always around 30 deg.
Because the sec pole is right at 63MHz and cannot be moved right(high freq).
I know the sec pole coming from the folding point, but no...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
