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Hi Everyone,
I'm at the dead-end here and don't know what to do, really need your help.
I'm having a layout design in such a way that two transistors are sharing the same diffussion. (Refer to the picture below) Where the first transistor drain is connected to the second transistor gate
The...
gate propagation delay
Hi everyone,
I'm currently performing failure analysis on one my devices.
I would like to know which of Design (Design A and B) have a longer propagation delay from the Input to the Output (refer to the diagram)? Assuming that all the transistor parameters are...
Thanks for the answer.
Your right I need to have to learn more on the verilog basic syntax. Any books that you can recommend to learn the verilog basic syntax?
Hmmm......was wondering:
Why both ndata and data be the same values when one is concatenated with:
data_background and the other is...
Re: Please Help. I need some ideas to isolate this problem :
hi dkace,
i show 4 cells in the row. The driver-multiplexer between the dummy and driver-multiplexer1 is failing.
The dummy cannot be toggle as I cannot connect it to an input (it has no fan-in) since it is just a dummy or a...
Re: Please Help. I need some ideas to isolate this problem :
hi dkace,
Thanks for replying.
the problem is the driver-multiplexer cannot be tap out directly out of the FPGA.
But I have done the following:
The top eye view of the connection would be:
input > driver-multiplexer > bus line >...
Hi guys,
I need your help. I'm actually working on isolating a failure on an FPGA.
From the electrical analysis I was able to identified the failure was caused by a driver or a multiplexer (Circuit.jpg) which was stuck logic 0 instead of driving a 1.
I was able to disable the driver. In hope...
what is value of 3.3 and 2.5
Hi,
I'm looking at the datasheet and I came across this description for a VCCSEL pin.
When they say VCCSEL can control whether a 3.3-/2.5-V input buffer or 1.8-/1.5-V input buffer.
Does it mean it can receive input voltage of 3.3 and 2.5V or 1.8 or 1.5V?
Thanks
Hi guys,
Does anyone know what is leakage current? How is it cause? If for example a device that was tested on a tester board have a very high leakage current how to overcome this problem?
Hi,
Can anyone help me explain this terms?
1. Metal7, Metal8, Metal9
- Is there any website that provides a clear explanation on the die fabrication process?
2. Clock tree
3. Parasitic fanout
Thanks
clock multiplier logic
I'm sorry but i still could not see how this can be implemented using basic logic gates or with a flip flop.
Can anyone help me to illustrate the digital logic schematic for the clock multiplier?
servo slow down
Hi,
I was working with a servo controller recently. My initial design was using two 555 timer. One is an astable which generate 20ms period and a monostable which i use a potentiometer to control the pulse duration. I was able to control the speed and the position of the servo...
Good day everyone,
I was working with the switching circuit which is provided by IanP.
I encounter some problem with the floating node which is the connection to the microcontroller. As when the microcontroller is off and the power supply connecting the 9V is on it generates a high impedance...
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