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For pipeline ADC, the reference voltage (Vref_top & Vref_bot) for MDAC operation suffers from the residual input voltage on the sampling cap, which will cause the reference voltage to vary. When the sampling frequency is low, a reference buffer is generally used to settle the reference...
saturaion
For a Gilbert mixer, should the switching quad operates in saturation or triode region to maxmize the gain ?
Since the switching quad just acts as a current switch, I thought it can operate in triode region. But simulation result shows that this will significantly decrease the gain...
Re: How to simulate the IIP3, NF of a non-50 ohms input circ
Thank you for you explaination.
A more question is that I want to calculate the overall NF, IIP3, gain with the formula F=F1+(F2-1)/G1+...., IIP3=......
Does these formulas stiil valid when I use your methods to determine the NF. IIp3...
For a circuit whose input impedance is high, how to simulate its IIP3, gain, NF so that I can use these parameters to calculate the IIP3, gain, NF of the overall cascade chain?
I am now designing a divided-by-2.5 prescaler using phase-selecting technique. So first a divided-by-2 prescaler is designed with CML circuits and then the four quadrature signals are selected by a MUX to the output. The question is how to design the control logic of the MUX. I know the MUX have...
please tell me what the most commonly used techniques are to cancel the DC offset in direct conversion receivers and please recommend to me some good papers related to this issue.
Thanks.
DenisMark:
Thank you for you explaination. In fact what I doubt is that in Gray's book it is said that Miller effect is not useful for calculating high-frequency reverse transmission or output impedance. So I have been a lillter confused about how to calculate Cgd's effect on Cd.
Thank you...I am also wondering that whether Cgs effect the drain capacitance since cgs is connected with cgd...
Added after 4 minutes:
I know this equation, but I don't see it in other textbooks. I am a little
doubt about this since the miller effect is usually used to calculate the forward...
How to estimate the node capacitance at gate and drain of a common-source amplifier? I am not sure the Cgd effect Cd...For Cin I know Miller approximation can give a good estimation. Cin=Cgs+Cgd(1+Av), but how does Cgd effect Cout at the drain??
It's said short channel MOS devices operating in velocity saturation have a relatively constant transconductance with sufficient gate overdrive.
Why and what does this mean excatly? Thanks.
what does differential input voltage mean
So if i have differential input voltage vi and -vi, does the differential voltage mean 2vi and the differential voltage amplide is mag(2vi)?
low passfilter, load resistance R0, series inductro L=R0/wo, parallel capacitance C=1/R0W0, w0 is the cut off frequency.
This is the second-order strucutre, does somebody knows more about this filter structure such as other high order structures of this filter?
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