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Recent content by z81203

  1. Z

    What is the best Verilog Editor ?

    [Req]Verilog Editor if you are an eda's user, you must use unix(ex. linux). if you use unix, you should be try vi(vim). vi(vim) is the best editor.
  2. Z

    Cadence IC5 display problem on RedHat 7.2

    ic50 display problem? cds just support 8 & 24 bit mode.
  3. Z

    verilog code difference

    1 second clock verilog code first is simultaneously, second is sequentially.
  4. Z

    Which version VCS begin to support PSL or system verilog?

    hi, what's the difference about v7.2 and x.0506? thanks.
  5. Z

    Does Cadence have sth like Synopsys SNUG?

    yes, i just heard it.
  6. Z

    Compiling C code in linux

    there is gcc with each linux, try it.
  7. Z

    cadence ic remote acess issue

    for i know exceed is good, or you can try xwin32. vnc is free.
  8. Z

    How Linux PC check-out license from UNIX lic server

    linux pccheck check some knowledge about 'flexlm'. 1st, start a license server on sun workstation. 2nd, set 'setenv LM_LICENSE_FILE portnumber@lic_svr' on linux platform. it's for csh shell. lic_svr is your sun workstation. 'LM_LICENSE_FILE' is a general environment variable. some tools have...
  9. Z

    How can i provide space b/w the bits of a binary string ?

    help ....Verilog you would be try this "1_1_0_0_0_1_1_1". normally i wrote binary like this "8'b1010_0101".
  10. Z

    who can tell me? ! thanks! urgent!!!!

    for csh try this (just like) setenv SNPSLMD_LICENSE_FILE 26585@licsvr setenv SYNOPSYS /eda/synopsys/solaris/syn200x.xx set path = ($path $SYNOPSYS/sparcOS5/syn/bin)
  11. Z

    Help - sdf anottation using vcs

    $sdf_annotate in vcs $sdf_annotate is a standard function of verilog. all verilog simulator can use it. include nc(xl), vcs & modelsim etc.
  12. Z

    How to use 8051 to handle about 1MB of memory?

    8051 more than 64K check dallas 320 series.
  13. Z

    a tool that convert verilog code to block diagram?

    convert verilog code to block diagram summit can do it. name is visual-elite. or you can try hds of mentor. good luck.
  14. Z

    what's the difference between VCS and VCSi ?

    vcs vs vcsi i think mxi is the sub-set of mx. just like pe & se of modelsim.
  15. Z

    Looking for a good Linux text editor for Verilog design

    Text Editor [Linux] don't give up vi(vim), it's the best. try it.
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