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Recent content by yyliang

  1. Y

    DC/DC Converter Model in Matlab/Simulink

    matlab+dc/dc converter The second pdf file is very good. Thanks a lot.
  2. Y

    how to improve the parr of a bandgap

    with large L, the ro of transistor is also big
  3. Y

    How to increase CMRR of a telescopic opamp?

    Re: opamp make your input differential pair with big w/l, pay attention to the match of the current mirror, and you also need to reduce the system offset.
  4. Y

    bandgap floor planning

    the layout is compact and very nice
  5. Y

    Help!!!What is "pwell soft connected", a DRC error

    Re: Help!!!What is "pwell soft connected", a DRC e soft connection means two well or two diff region connectted only through well or diff, there is no metal connection between them.
  6. Y

    How to analysis the stability of integrator/filter

    Thank you,willyboy19 What you mean is that when we design the op-amp used in the integrator,we need not to have a phasemargin larger than 45(or 60),why can we do it in this manner? would the op-amp oscillate in lower frequency than the close loop bandwidth? perhaps the feedback capacitor of the...
  7. Y

    How to analysis the stability of integrator/filter

    The stability of integrator/filter is decided by which factor? what is the infect of the feedback capacitor? Could we think that if the op amp is frequency stable and its GBW is large enough, then the integrator/filter is stable?
  8. Y

    The simulaiton of 2-order Low Pass Filter

    Hello,I am designing a 2-order LPF,but I don't know how to do the simulation of AC characteristics for closed loop LPF and open loop LPF,can somebody help me? Thanks a lot!
  9. Y

    Common-mode feedback in the full differential opamp?

    op amp single-end differential I am designing a op amp,the first stage is differential output and the second stage is single-end output,need I add a CMFB circuits to the op amp for the first stage?
  10. Y

    How to simulate the offset of clocked comparator?

    how to simulate the comparator How to simulate the offset of clocked comparator?
  11. Y

    the best web site of analog ic design

    www.designers-guide.com is fiarly good there is some useful resource
  12. Y

    Can I modify an extracted view before I create the netlist?

    Re: Can I modify an extracted view before I create the netli re-extract the layout and you will get the modified one
  13. Y

    How to make a good MOS model for a design?

    Re: MOS model for design Bsim level 3 model you can find it in many places
  14. Y

    Efficiency of Analog IC Designing

    I think the second is better circuit design and layout are not the same thing

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