Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by youmoros

  1. Y

    did any one knows how to place the spare cells in Encounter

    Spare cell placement Hi did any one knows how to place the spare cells in Encounter ? Thanks a lot.
  2. Y

    PLL & FPGA design

    dll pll fpga did any one got a VHDL description about that ADPLL ? Thanks by advance.

Part and Inventory Search

Back
Top