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Re: How to look for zero point and dominant ploe in AC analy
In Razavi's book "Design of Analog CMOS Integrated Circuits" the author used one chapter(Chapter 6 Frequency Response of Amplifiers) to describe how to estimate the pole.
"Association of Poles with Nodes".
Although the example...
Hi, Colbhaidh, it is said that the Chartered 0.18um 1.8V/3.3V RFCMOS process has no large-signal model. Someone also said this process has not been carried power verification. So it is impossible to design and implement a power amplifier, although such PA require relatively low output power, in...
Re: Antenna Software
Dear all, which one is better in the following software
for analysis of microstrip antenna?
HFSS
XFDTD
ADS
I can use XFDTD 5.3 but I have to share hardkey with others. Now I want to use HFSS, is it a good choice?
Thanks for your reply.
Re: RFIC design flow
Hi, I am also a freshman in IC Design.
Normally there are simulations in circuit design(prelayout simulation)and layout design(post-layout simulation, here are the parasitic extraction).
The most popular tools are Cadence spectreRF, Mentor Graphics EldoRF, or ADS.
You can...
Re: RFIC design flow
Hi, attached are materials I copyed from a professor's lecture.
Normally RF IC is just simple analog circuit. The difficulty in RF IC design is the parasitic effect in IC.
Hi, can anyone give me some comments about differential and push-pull power amplifier?
1.What’s the difference between the differential power amplifier and push-pull power amplifier?
In my opinion, differential means that two transistors are both working at the same time while the output...
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