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Recent content by YAI

  1. Y

    I need some help with a calculator in vhdl

    how can i reduce the program??
  2. Y

    I need some help with a calculator in vhdl

    so its there any way i can make it fit it on a gal? how? Besides that does it gave you an error or somethig like that when you compile it?
  3. Y

    I need some help with a calculator in vhdl

    well it says like this: Error: Logic equation has too many product terms on signal a_to_g(3). i think its the part of the comparator, cause i dont know exactly how to tell him how it should manage the 3 comparations in one statement. when i erased everything related with the comparator it says...
  4. Y

    I need some help with a calculator in vhdl

    i need help please this vhdl its for tomorrow!! i need to do a calculator of 2 bits which can add,subtract,multiply and compare between the numbers, i think that im close to the end, now it says that logic equation has too many product terms on signal a_to_g(3).please help its for tomorrow...
  5. Y

    I need some help with a calculator in vhdl

    i was expecting to take the result as the exit of the display. ok my description of the its like this: when s="00" do the sum and show the result in the display. with that i assume that first i have to put a case for the operation and later a case for the display this case must say when s=00...
  6. Y

    I need some help with a calculator in vhdl

    you were right i wasnt noticing how it work besides that i just started with programing(its my first week) so sorry if i dont get it too quickly:oops:,thank you for that, after correcting some mistakes, after that i have this library IEEE; use IEEE.STD_LOGIC_1164.ALL; USE...
  7. Y

    I need some help with a calculator in vhdl

    ok i did as i understood , i think i understand it, but i got some errors after this library IEEE; use IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; USE IEEE.numeric_std.ALL; ENTITY calc is Port (Num1: in Signed (1 downto 0); Num2: in Signed (1 downto 0); S: in STD_LOGIC_VECTOR...
  8. Y

    I need some help with a calculator in vhdl

    so do i have to erase this? besides adding your code? if (S="00") then a_to_g1<=SUM; ELSIF (S="01") THEN a_to_g1<=RES; ELSIF (S="10") THEN a_to_g1<=COM; ELSE a_to_g1<=MUL; end if; END PROCESS;
  9. Y

    I need some help with a calculator in vhdl

    i just added an if and a signal for the output it says that sum,res,com,mul should be referenced in the sensitivity list. what does it means? library IEEE; use IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; USE IEEE.numeric_std.ALL; ENTITY calc is Port (Num1: in Signed (1 downto 0)...
  10. Y

    I need some help with a calculator in vhdl

    you are right, it was that library. so if the processes are writing to the same signal how can I send the answer to the display?
  11. Y

    I need some help with a calculator in vhdl

    but my case ended with: when others multiply
  12. Y

    I need some help with a calculator in vhdl

    Im really new in all about programing in vhdl so please describe your answers. my teacher ask me to do a calc that can solve multiplication, sums, subtractions and compare between 2 number of 2 bits and be displayed in a 7 segment display. I did this program and only gives me 3 errors saying...
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