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I am working on IBM 32 nm soi process. The fet models available in the process have the 'length' field which is not editable. Can anyone help me with making the length fields editable.
thanks
Hello,
I have to run an Ocean script for the mismatch analysis of a 5 bit capacitive DAC. I have to provide mismatches to 32 capacitors and plot its fft. And also i have to run 100 simulations like that. Also i would like to know how monte carlo simulations can be done using ocean...
Hi,
I am trying to design a bandgap circuit. For small loads, my bandgap circuit is working fine over all corners and the bandgap voltage remains the same.
With small loads the bandgap variation with temperature is only 5mV i.e., vbg ranges from 734.5mV to 739.8mV. As the load is...
Yupp did u find any merging parallel or series connections. From the lvs debug you can zoom into that layout portion, and see if there is any merged connections. This is the only possibility I can think of.
Hi,
You might have missed out some connections in either layout or schematic. Width is not matching since your description says that layout has two instances of that resistor while schematic has only one instance. So in layout W is the cumulative of both instances. You might have messed up some...
With technology scaling and shrinking device sizes, subthreshold condition is becoming an efficient operating region where device functions. It is of importance in analog circuits while in digital circuits it is viewed as a parasitic leakage with no current flowing. It is perfectly okay for a...
127 thermometer to 7 bit binary can be converted using a 128:7 dot compressor. Compressor is used mainly in partial product addition in division which counts the number of ones and gives the corresponding binary estimate. Learn about dot compression. It will be a series of full adders and gates...
You can use cadence spectre for simulations. You can build the individual circuit models in spectre with transistor models. Ideal blocks from ahdl library can also be used.
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