Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
what knowledge is need for a beginner to design his/her own IC. What IC is usually designed by undergraduate student.
what software is needed for that purpose.
Thank you
XC
I need to supply clock signal to phase 1 and 2 for mc6800 which are NMOS inputs.
What PLD chip , in DIP package, can I use to which can produce correct signal for NMOS inputs.
Thank you very much
XC
6800 clock signal is defined to be NON OVERLAPPING phase-1 and phase-2
however reading from datasheet, the delay time "td" is maximum 9100 nano second.
this means phase-1 and phase-2 could be @ the same logic maximum 9100 ns.
which I find it is contradictory to the NON OVERLAPPING requirement...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
