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Hi ethan,
I also find this problem when I simulated the folded cascode amplifer with SC CMFB using PAC function in cadence.
The gain-boosted amplifier has about 110dB DC gain, but it droped to 64dB when I using SC CMFB.
Could you help to figure it out?
Thanks!
BR,
Winson
Hi casol,
I think the main reason is you satuate the quantizer and the loop could not work properly.
BTW, the coefficents of loop filter is not reasonable. How can you get the paramters?
sigma delta stability
I think you are right. The analog design is just a trade-off and no the absolute best solution.
I have dowloaded the toolbox and will try to stuty this one.
In fact, my ADC is used in TV audio, such as recording. The power consumption is not so tough.
Would you give some...
how do you define number of bits sigma delta
Please help to recommend some good papers which are focused on audio sigma-delta ADC. Especially the architecture is good and has been verified by you. Thanks!
dac harmonic
I have designed a 10bit 60MSPS current steering DAC.
The simulation showes the 3rd harmonic is a little large.
Simulation results are showed in attachment.
What is the reason of 3rd harmonic and how to reduce this?
Thanks!
I am curious about your architecture of your BG
I think the performance of your BG is very good.
Could you give more information about you BG, such as process, power consumption? Thanks!
The opamp is used as a tran-impedance buffer.
The process is SMIC 90nm I/O 3.3V Transistor(L>0.38u)
DC Gain>80dB
Unity Gain Bandwidth>600MHz
Load=250||20pF
Phase Margin>60
Who can helpe me and any advice or paper is welcome!
Thanks!
switch for current dac
Hi Erikl,
I think it's very hard to evaluate the charge induced by the glitch.
Up to now, i think the current glitch maybe generated mostly by the clock feed-through.
Anyway, really thanks for your help!
Best Regards,
Winson
glitch dac
The architecture of my DAC is current steering.
I think the timing of my DAC is OK, at least the function is right,
but i simulated the DAC, the performance is so bad and i found maybe only the current glitch is the main reason.
Could you give any advice? Thanks!
Best Regards,
Winson
current switch for dac
Hi Erik
Really appreciate for you help.
For your experience, how much the influnce the current glitch on the performance of dac? Thanks!
Best regagrds,
Winson
current steering dac
Hi All,
Due to the charge injection and clock feedthrough, the switch will generate very large current glitch during the low to high or high to low transition of the switch for the current steering DAC. For example, the current source is 32uA, but the switch will generate...
startup circuits
1.what is your initial seting for your circuit or why you do that?
Becuase you have an inable pin?
2. The mean state is a stable state and in this state the VBGR will not start ever without start-up circuit.
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