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I do not know how to upload picture. the circuit of bandgap is common used, about 1.2V vref out, and no use opa.
I find the Vbe change little with temperature, it seem not right. I wonder it is the reason of model.
Hi, dick_freebird:
the model I used is relatively accurate. More strangely, in some case, i can get upward and downward curve by adjust some paramenters.
you say upward is not the norm, can you explain more? Thanks!
---------- Post added at 09:45 ---------- Previous post was at 09:42 ----------...
About test environment: FPGA supply 14-bit digital signal---DAC process--return the output of DAC under test to FPGA, ADC in FPGA(12bit-ADI)output, then, FPGA collect the digital signal, using matlab, process it.
this DAC is current-steering, in test, the SNR of DAC in one aspect (sample and signal frequency is changed) exceed 50dB, but the SNR of ideal 8bit DAC is 50.
is it normal? or the test is wrong?
this DAC is current-steering, in test, the SNR of DAC in one aspect (sample and signal frequency is changed) exceed 50dB, but the SNR of ideal 8bit DAC is 50.
is it normal? or the test is wrong?
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