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Re: problem in isp.
Hi
Normally with ISP and JTAG programmers when you get eratic results you have
noise on the clock line of the ISP programmer. Normally it helps putting n small ceramic capasitor (2.7pf to 10pf ) near the device you try to program on the TCK
line ( or whatever the clock...
Re: Switching to AVR32
Hi
Inclues the lot :
STK1000 provides a complete AT32AP7000 development environment. The kit has two ethernet ports, a high quality QVGA LCD, a loudspeaker, and connectors for USART, PS/2, VGA, and USB. A expansion header can be used for prototyping.
A pre-installed...
winarm optimization
Hi
You cannot go wrong is looking at the Atmel SAM7 series.
Free GNU tools available at hxxp://www.yagarto.de/
hxxp://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/#winarm
with a lot of examplles. You can also buy n nice dev kit for a very low price
wb
atmega8 usb driver
Hi
Why not use one of the Atmel AT90USBxxx devices , It is a AVR with USB port included. Your mega8 code will run as is , just add the usb code
Wb
avr32 parallel port
Hi
First start by going to the Atmel web site and have a look at the documents.
Depending on what you need you can look at the AP7000 devices.
full blown with MMU and support for linux image etc. but no on board flash
on board graphic controller etc . Good for doing PDA...
Hi
What is your timing constraints and what does the timing analyst tell you after the compile.
Sounds like you are running into timing issues
Can you upload tour routing/timing report
Regards
W
Hi
Look at this reference design for the LM5020 vin 10/12V out 100,-36,-52 you must just change the transformer windings to get the correct output or loot at the national web site they have tons of reference designs to choose from
Regards
W
Hi
The easy way in a Altera device is to place a signal tap analyser inside a device
montoring a couple of input pins , and taking this pins to the circuit you need to have alook at , the analyzer software is already built into the quartus software.
Regards
W
Hi
Most set top boxes use chipsets , have a look at Broadcomm , NEC and ST they are some of the many big companies making chipsets for set top boxes.
Regards
Re: Why is the Standby Current so high? (Altera Cyclone FPGA
Hi
Have a look at the following link
https://www.altera.com/support/devices/power/overview/pow-overview.html
Regards
Hi
For sysnthesys
EDIF is good there is no means known to get back to VHDL
If you are using Altera FPGA you can export a VQM ( Verilog netlist file ) file
wich is usable but cannot be edited . Xilinx should have a similar netlist format
( XNF I think )
Regards
Hi
Yes IO pin is fixed to a spesific IO bank , you can route any signal to the IO pin but if you use say a PCI pin or funny HSTTLxx signal it will ony be avaible on a spesific bank ( PCI top and bottom banks ) other interfaces left and right bank.
W
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