Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by whicun

  1. W

    how do I connect a FPGA to a VGA monitor?

    view the following links... http://elm-chan.org/he_v_e.html regards,
  2. W

    How do we protect Verilog/VHDL IP cores?

    Re: IP CORES Protection You can complier your HDL source codes to EDIF. EDIF file format should be recognised by many EDA tools.
  3. W

    PORT MAP error when compiling code in Quartus II

    port map others Hi, You can try to move the follow lines out of process; dff3: DFF port map(clk,in_sig3,in_sig2); dff2: DFF port map(clk,in_sig2,in_sig1); dff1: DFF port map(clk,in_sig1,in_sig0); dff0: DFF port map(clk,in_sig0,out_sig); regards,
  4. W

    Biquad implementation in fpga

    Hi, I think you can implement biquad by add a simple CPU into FPGA. regards,
  5. W

    FPGA vs DSP which one is better

    FPGA can do everything more than DSP do,
  6. W

    Virtual COM port in C

    you can't use inportb() and outportb() in windows,but you can try to access vitural COMM by windows API. check microsoft MSDN for more information. or Search www.google.com by keyword:CreateFile CloseHandle ReadFile WriteFile
  7. W

    HELP! Which one is suitable for me?

    mutevaggil, I think Visual C++ is suitable for you, since VC be good at deal with low layer hardware interface. regards,
  8. W

    Can I use NAND Flash with regular static memory bus?

    bobsanjose, you should design a glue logic between CPU and nand flash to mimic nand as a Sram. See the appnote 'Operating a NAND Flash Device Through an FPGA', **broken link removed** regards,
  9. W

    Need to synthesize mixed HDL files in Quartus II

    I need to synthesize verilog HDL 、VHDL and EDIF files into one FPGA. Does someone known how to synthesize mixed HDL files in Quartus II? Thank you in advanced,
  10. W

    Reset multiple PICs on 1 board

    I think you can use several doides and a resister to address this issue.
  11. W

    Freescale Open source Debugger (BDM)

    freescale debugger Does this debugger support MPC852T?
  12. W

    free vhdl to verilog converter for windows

    vhdl to verilog converter tool Does the converter result reliable enough?
  13. W

    How to build an FPGA controller?

    Re: fpga controller You can try the follow link, http://www.fpgacpu.org/
  14. W

    Simple MCU implement by FPGA

    SolarTorch, I hope the follow link is usefull for you. **broken link removed** regards,l
  15. W

    Keyboard interface with XSA 50

    magnetra, I think you need to write the second PS/2 driver by yourself. regards,

Part and Inventory Search

Back
Top