Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hello,
I have been reading the book "Operational Amplifiers" by Johan Huijsing. A mosfet-based class AB output stage is described that has two translinear loops which keep each device at a minimum current when a large current occurs in the other.
Some equations are given, 5.3.7 and I am...
Hello,
I am working on a project for a course where I am required to design a differential OTA and implement the amplifier's feedback using switched capacitors.
I would like to design the switched capacitor feedback network first, while i work out some kinks in my differential OTA, and thus...
Hello, newer designer here so please bear with me.
I am designing a clock distribution circuit where minimizing additive jitter is critical. I am driving 2 equal length wirelines with two large inverters, taking care to use the smallest resistance metal layer available to me.
This is the...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
