Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
delay modeling in interconnects
Hi all,
I am trying to simulate thermal gradient dependent RC interconnect delay simulation. Can I do it with Hspice? If so, would you inform me how to do it?
Thanks in advance.
hspice leakage
Hi all,
I am having trouble to simulate band to band tunneling leakage (btbt) of cmos using PTM (45nm) library. Do you know how to get the leakage from the hspice?
Thanks in advance.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
