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Some measurement instruments have IQ noise measurement options :-P. If you want to simulate the NF of an IQ system, then you indeed run into the problem of the definition for input and output, because in most software you can specify only one input and one output :-?.
The solution is to create...
Experience with analog auto-placers for IC design?
Hi,
in IEEE JSSC and other journals you find many descriptions on analog placers, but I still think the status of todays tools for analog layout tasks is still low. For instance, look at "Deterministic Analog Circuit Placement using...
Hi,
I wonder if the medium-VT NMOS can be put in a deep-N-Well in TSMC180nm MS/RF process? That would help in some situations. Does anybedoy has another idea of making a good source-follower buffer with little voltage shift and gain close to unity?:-P
Bye Stephan
Thanks for fast feedback and good hints.
I think in one application like making a CML source-follower, just a high-speed buffer with certain special level-shift the native NMOS looks feasible, but for the application as NMOS power device in a LDO the native transistor is not such a good idea...
Hi,
in CMOS processes like TSMC 180nm often the minimum channel length of mVth and native Vth transistors is much larger than for normal NMOS or PMOS transistors.
I need a native Vth NMOS with good RF performance, i.e. low Cgs and L. Is that possible, it would hurt the DRC and would have large...
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