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I want to use DesignWare vip in ntb. Is that OK?
when I compile ntb with vcs7.1,errors occure:
..........line 101 : Error: unsupported Vera construct 'vera_shell_param' encountered
}
" ", line 0 : Error: unsupported Vera construct 'attribute decl' encountered
}
What does that mean?How can I...
when I was importing a netlist with CDL-in cammand to generate a schematic view,I found that the schematic did not appear as I expected: the MOSFETs were overlaped with other,I can not see any nets or P/G symbols,but the connection between each component is correct .What's wrong? any suggestion...
when I configed mixed signal simulation with cadence Analog Atist, an error occured:
you must viewing a 'config ' viewtype to run Artist with SpectreVerilog
How to solve this problem?
Any suggestions will be appreciated!
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