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Recent content by vpabba

  1. V

    Calibre DRC/LVS inputs

    yes, by checking the option "Export from layout" calibre exports gds2 for you. alternatively you can export from virtuoso tool and the give the file path these it can also work.
  2. V

    Shift the voltage level

    Ya thats good idea to use the amplifier to boost the signal go ahead
  3. V

    Shift the voltage level

    Use level shifter to shift the signal level it may be downward or upward
  4. V

    Best Minimum delay for 2x1 mux using transmission delay

    Re: Best Minimum delay for 2x1 mux using transmission delay(65nm node) you can try by changing the circuit logic or else by changing the transistors vt's, that may be help full.
  5. V

    library 0.13u in cadence

    TSMC provides a PDK for each tech node, so you can you use that PDK to continue work
  6. V

    Cadence: M1 metal layer capacitance

    hi you can find a section called "electrical parameters & models" in Design Manual, in that section you can find the wiring capacitance & sheet resistance values with these values you can find the actual cap or res value of drawn metal
  7. V

    Create path option in cadence layout

    Instead of changing the layer in pop-up menu you just make the layer as entry layer in LSW then use Path command, it will draw that particular layer only
  8. V

    what is the effect of floating net in layout

    if the floating net between very aggressive net & very sensitive net.... then the floating net act as a intermediate net between nets and sensitive net may be affected just like as you said by charge accumalation & capcitance... so its always better to clamp this type net to vdd or ground
  9. V

    hai frnds.what is matching trnsistor.plz explain

    if transistors are working at higher frequency then the characteristics of adjacent trans will change, to avoid this we provide same environment to a critical transistor i think this is called macthing
  10. V

    Layout: Any risk put two w<<L transistor close?

    The DRC it self say that it will work with out any problem, but in general in industry all are not going with exact DRC rules means that they put the spacing between them more than as specified in DM to get better quality and better yield. but in this case it not possible in newer technologies...
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