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Recent content by vonleo

  1. V

    Do we have to check INL/DNL?

    For a converter design, how does the static performance (INL & DNL) affect the dynamic performance? Of course a bad INL or DNL will lead to a inferior SNR and THD. But if the dynamic performance is checked and proved by the Monte Carlo transient analysis, is it still necessary to check the...
  2. V

    Confused on the PMOS biasing.......

    why to bias the mirror if a current source is used?
  3. V

    is it good using Deep N-well for Analog circuit?

    Deep N well need large silicon area
  4. V

    How to decrease bandgap noise?

    Re: bandgap noise I think for real low noise performance. say 2uV (20-30kHz), maybe Opamp shouldn'd be used.
  5. V

    cmos bandgap BJT why use N=8 ??

    if for low noise reason, high dimension ratio is used, like N=48, even 108....
  6. V

    a question about bandgap circuit

    if lateral BJT is available, I guess it is more efficient than vertical one.
  7. V

    Fast settling time, low noise CMOS bandgap configuration

    Re: bandgap problem if power is not a main issue, maybe use chop modulation to achieve low noise bgp instead of large trans?
  8. V

    Is ADS accurate for VCO simulation???

    I think ADS has a converge problem too, especially for ring osc. And in ADS, you have to add a special port in the circuit to measure the PN, I never figure out how to set all the factors in that port correctly... :(
  9. V

    What types of applications need ultra low power IC?

    for cardio paceholder, the speed have to be low, and it have to be low power. the CMOS can work in subsaturation region for this application
  10. V

    Mixer and LNA simulation in Cadence

    cadence + lna design Thank you very much!
  11. V

    Mixer and LNA simulation in Cadence

    lna simulation Hi, guys, I just began to simulate RF circuits by spectraRF. Could you suggest some good tuition documents for simulating LNA and Mixer? Thanks!
  12. V

    hybrid for a mixer differential input

    Hi, guys, I need to design a Hybrid to generate a differential RF signal as the inputs of a Mixer. Where could I find useful information for this. Since my points is so small, so could you give me some links, which can be download freely. Thank you very much!!
  13. V

    Why does the IP3 of LNA affect blocking performance?

    Re: Why IP3 of LNA? for a two stages LNA, generally consider more about noise for the first stage and linearity for the second stage.
  14. V

    What is the future for CMOS Analog IC Designers ?

    AD/DAC is the killer, I guess the key proplems in front-end receiver have been solved, the remaining part is how to control and compensate it by digital circuit and make it work better.
  15. V

    Help me with a bias design that outputs 2 bias currents

    Re: bias design maybe translinear circuit is possible.
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