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hiii leo_o2
can you please tell me some information regarding convergence problems?? how does it occur?? and how to overcome those convergence problems??
hii diod
if u want to calculate total power of any design we can directly declare as
.power option..
it gives total power for the design..
if u want to calculate leakage power then u can calculate it using
p(instance_name)
hii all
can any tell me good book for hspice?? plz give me links for those books so that it will be very much useful for my project.. also can any one tell me details regarding convergencr in hspice?? reg transient and dc convergence problems?? any my other question is why does there wont be AC...
@teddy... yeah u understood question correctly... but what i'm doing is replacing (inverter and nmos) with pmos as the operation is same... as need a slight modification so that area can be reduced... but my question is will there be any problem with power consumption if i replace it??? i'm...
i mean replacing inverter and nmos with pmos... the operation is when we give 0 as the input after passing through inverter it will convert to 1 and then it is passed to nmos so that it will ON the nmos transistor.... when we give input as 1 after passing through inverter it will give 0 so that...
hii..
i have an cmos inverter and a nmos transistor in series.. i need modification to this to reduce the power even if the transistor count increases... plz help to replace this and keep any device to reduce power..
plz mail me the answer to vnagarjun@yahoo.com
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