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Recent content by viperpaki007

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    I need your help in design LNA

    Generally the process parameters for a given design kit e.g. 0.18u are provided in process design kit (PDK) documentation. Unfortunately most of the design kits are proprietary and manufacturers do not disclose these process parameters publicly. Thats why either you need to have access to...
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    I need your help in design LNA

    As a start you can read RF Microelectronics by Behzad Razavi Chapter 6
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    Relationship between large and small signal linearity

    Hi, As far as I know, small signal non-linearity in MOSFET is mainly due to non-linear behavior of transconductance and output conductance. It is generally measured in IIP3 value. On the other hand, large signal non-linearity of MOSFET in an amplifier is related to its maximum linear swing...
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    Seperation between ground plane and microstrip.

    Hi, Can someone educate me how to choose the separation distance between ground plane and microstrip line. I had read somewhere on internet that smaller seperation between ground plane and microstrip line reduces the inductance and makes the high frequency response better. Is it really the...
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    Noise figure simulations of an ideal amplifier

    Hi, I want to simulate NF values of an ideal amplifier. For modeling amplifier noise, i have put a noise voltage source in series with amplifier input and noise current source in parallel to amplifie input. The sources take the spectral noise density values in Volts squared per Hz and Ampere...
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    Design transfer Tool in Cadence virtuoso

    Following is the results from CIW window: load "/tmp/dumpFile.il" t dumpFile.il nil The CIW window after that does not show anything.. How can i open the dumpFile.il as schematic
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    Design transfer Tool in Cadence virtuoso

    I found somewhere that dbWriteSkill command can be used to generate .il extension file for a schematic. This .il extension file can be loaded back to other versions of virtuoso to get the schematics back in other versions. I know that this procedure will not account for design kit models but i...
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    Design transfer Tool in Cadence virtuoso

    Well certainly there will be need for modifications in some parts of circuit but if i was thinking if there is some software which can just transfer the schematic files to another design kit and later on designer can tweak the schematics a bit to get the required performance.
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    Design transfer Tool in Cadence virtuoso

    No ...i mean different design kits...For example if one design kit is 180nm and i want to convert the circuit diagrams to a different design kit lets say 65nm. How i will do that. Design kits may have different models so some software which does the model translation.
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    Design transfer Tool in Cadence virtuoso

    Hi, I have a problem to transfer the simulation files from one design kit to another design kit in cadence virtuoso. The simulation files and circuit diagrams are quite many and it will take ages for me if i tranfer the files manually. Is there any kind of tool which can convert one design kit...
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    port in cadence spectre for differential circuits

    Hi, How can i use port from analogLib in cadence spectre. If i have a differential circuit of 100 ohm differential impedance, can i just directly connect port (by putting R=100 in settings) to differential input of circuit?. Will this give right results? BR
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    Difference between gate resistance and input impedance

    Hi, It is normally mentioned in books that the input resistance of mosfets is ideally infinity. No DC currents pass through the gate. However, i also read the term gate resistance and it is normally mentioned that gate resistance should be low, in order to provide fast operation. What the...
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    IP3 point of overall receiver

    Normally in receiver design, the later stages contribute to IP3 value more that the first stages but does anybody know the reason why it is like that. regards
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    [Moved]: plotting region of operation in virtuoso 6.1.6

    Hi, In previous versions of cadence virtuoso, i used to plot the transistor region of operation from edit> component display. Now in the newer version 6.1.6, i cannot find this option anymore. Can anybody tell how i can annotate transistor regions of operation. Regards

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