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Recent content by vinodh475

  1. V

    RANDOM NUMBER generation

    i have written verilog code for RANDOM NUMBER generation and it is generating list of random numbers(around more than 1000 and i can increase this number also). but i want to check the quality of random numbers that i have generated . can u please send me any algorithm to check quality of the...
  2. V

    how to write output in file (in veriliog)

    i am writing one verilog code my number is 128 bit number and it will generate different number in every clock cycle so i need to write each and every number in a file can u please help me how can i do that?
  3. V

    AHB frabric

    i have AHB fabric it consist of 2 masters and 7 slaves integrated already. but the problem is i want to read only one slave from outside of the integrated. out side signals should not effect the remaining slave IPs please reply me as soon as possible thanks in advance
  4. V

    why transistor sizing is not required in analog circuits ?

    example in OTA design we will take all mosfet's are with same sizes why is it so?
  5. V

    how to find Gm value for 3 OTA grounded indutor

    generally Gm=Io/(Vin+-Vin-), but realizing RLC LPF using 3 ota inductor .in that first ota Vin+ connected to resistor terminal and Vin- connected to capacitor so how can i find GM value???? plz help thax in advance
  6. V

    why long channel devices preferred in analog and short channel devices preferred in d

    why long channel devices preferred in analog and short channel devices preferred in digital?
  7. V

    can u please inform me about internships in vlsi domain

    i am vinodh doing my m.tech micro electronics first year in manipal university. i need an internship in any of the vlsi companies can u please help me. my 10th marks 85% my 12th marks are 87.8% my b.tech marks are 77.98% my m.tech CGPA 9.08 (in 1 sem) please help me sir
  8. V

    iam doing my m.tech in manipal university i need an internship in any of the vlsi com

    i am vinodh doing my m.tech micro electronics first year in manipal university. i need an internship in any of the vlsi companies can u please help me. my 10th marks 85% my 12th marks are 87.8% my b.tech marks are 77.98% my m.tech CGPA 9.08 (in 1 sem) please help me sir
  9. V

    plz help me i hate to submit before 30th of this month

    i have to design layout for my inputs are newdata and presentdata both are 8bits how can draw layout for leftshift the newdata ,rightshift the new data ,xor(newdata,presentdata) operation and caluculating numberog 1's in the xor operation
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