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Recent content by vimalraj205

  1. vimalraj205

    LEF - loading error in the bondpad syntax

    hai friends when i am trying to load a lef file containing bondpad in encounter the following error arise The bump macro "PBP_" does not have geometry on metal layers so it will be ignored can anybody say what is the error here
  2. vimalraj205

    Cadence EDI example TCL script

    you can search for tcl scripts in the soc installation folder
  3. vimalraj205

    Encounter ilm flow for a toplevel design

    Hai I am running a hierarchical design with a block level which is integrated into a top level i created a ilm directory in the encounter session of the block level by using the command createInterfaceLogic -dir xxxx then with this dir i started a new encounter session and laoded the ilm...
  4. vimalraj205

    set_clock_latency regarding

    Hai ramesh thank you for your reply i hope target clock is the capture clock path and source clock is the launching clock path since setup check considers late delays on launch clock and early delays on capture clocks hold check considers early delays on launch clock and late delays on...
  5. vimalraj205

    set_clock_latency regarding

    thank you rca then what does the max min options implies thank you
  6. vimalraj205

    set_clock_latency regarding

    hai friends I have a doubt in a constrain What is the meaning of the following commands set_clock_latency -source -early -min 0.6 [get_clocks CLK] set_clock_latency -source -early -max 0.2 [get_clocks CLK] set_clock_latency -source -late -min 0.6 [get_clocks CLK] set_clock_latency...
  7. vimalraj205

    Set_multicycle path regarding

    Hai friends i have doubt whether can i set a multicycle path of setup value 0 set_multicycle_path -setup 0 -from xxx -to yyyy -end will i be able to meet setup and hold for this path if setup is checked at 0 how should i give a multicycle path for a hold check Thank you
  8. vimalraj205

    [SOLVED] Adding FILLER Cells in virtuoso

    Hai friend if you are doing your block in virtuoso there is no need for Filler cells you can import it in to encounter as a hard macro but it must be LVS & DRC clean you can do your top level and add filler in encounter and once again you can check LVS DRC in virtuoso Thank you
  9. vimalraj205

    set up and hold violation

    hai friend can you refer the doc attached in this link https://www.edaboard.com/threads/40855/ or you can refer vlsi-expert blog for your doubts thank you
  10. vimalraj205

    problem when adding stripe

    Re: problem when adding stripe :antenna segment Hai friend you must first finish your power planning first and then go for the placement if you are facing such problems you can try those in the GUI window and even if you cant solve this can you represent it in a pictorial view
  11. vimalraj205

    Need help in dumping combo logic level cont

    Hai friend, you can use the command report_timing -collection and write a script to get the each inst level and count the no of logic levels in a path thank you
  12. vimalraj205

    STA- Timing path from fast clock to slow clock

    hai Ramesh yes rightly said you can search Multicycle path for multiple clock domains and find some useful docs regarding this thank you
  13. vimalraj205

    STA- Timing path from fast clock to slow clock

    Hai ramesh you can set multicycle path for both the conditions i.e from slow clock to fast clock and from fast clock to slow clock for the condition from slow clock to fast clock set_multicycle_path x -setup -from launch_clk(slow) -to capture_clock(fast) -end ---> which will add multicycle...
  14. vimalraj205

    [SOLVED] How can I write out .lib file of a digital module designed in virtuoso?

    Re: Writing out .lib & lef from virtuoso hai friend i have loaded your lef and i have placed your block inside the core and i have attached the screenshot of it i am confused why you are not able to do it thank you
  15. vimalraj205

    tsmc18rf layer map file

    hai i hope you no need a layer map file to generate a lef file it is needed only when you you work a GDS file..
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