Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by vilas_nakade

  1. V

    DFM rules for 65nm/45nm technologies

    Friends, Please share DFM rules for 65nm/45nm technologies. What kind of rules added in DRC apart from guideline like spacing, overlap, density, no of contact etc. Also let me know what is Wbp and Lbp. Thanks in advance Regards Vilas
  2. V

    which one is more matching for these two layouts?

    First one will give better matching because matching depends on placement and current direction. Since in first case current flow in same direction i.e. from left to right.
  3. V

    CMOS circuit design using Hspice

    Hspice simulations Thanks alot for information......as i said I need some reference manual to start designing as reference given by "zhxwind". I have spice manual with me.
  4. V

    CMOS circuit design using Hspice

    HI Friends, I am beginner for Analog design. I wish to work on CMOS circuit design. Could you please let me know any book which give details of CMOS circuit design using hspice. I have Hspice manual and tool to work on. It will be helpful if you can share basic circuits, design specifications...

Part and Inventory Search

Back
Top