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Recent content by venkatramana971

  1. V

    setting baudrate for vhdl code of uart

    Re: VHDL code for UART see the links below Transmitter code: http://esd.cs.ucr.edu/labs/tutorial/Trans_model.vhd Reciever code: http://esd.cs.ucr.edu/labs/tutorial/Recei_model.vhd go through that....... -Regards venkat (NITC) 09037272276
  2. V

    FPGA IMPLEMENTATION OF DATA ENCRYPTION STANDARD ALGORITHM

    Re: FPGA IMPLEMENTATION OF DATA ENCRYPTION STANDARD ALGORITH thanking u sir for guidance ....... but u have said about UART and REALTERM so the way, it required some code right??? and how it will be can u help me please.... -thanx and regards venkatramana
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    FPGA IMPLEMENTATION OF DATA ENCRYPTION STANDARD ALGORITHM

    HIIIIIIIII friends...!! i needed information about " TO GIVE THE INPUTS (64 BIT) IN FPGA FOR DES ALGORITHM" can anybody give me feedback about that please. i am doing on spartan 3e, it has 8 LED pins.....and one 16 bit LCD... and how can i write UCF file and how can we assign i/o pins pls...
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    Xilinx FPGA Implementation of DES Algorithm

    hi every body, This is venkat, Recently i successfully completed DES Algorithmm in VHDL. Now i would like to implement it on the Xilinx Spartan 3e FPGA kit. Can Any one help me How to assign Input and Output pins. Regarding This project related Material...
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