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Recent content by venkatpasumarthi

  1. V

    mit_db with modelsim

    thank you and now i find a way to write that code and am trying to write a code. if any errors occured i will be here soon.
  2. V

    mit_db with modelsim

    i though that the signals are analog and procesed by dsp. thats why i have posted the post in dsp. thank you for your suggetions actually i dnt know how to write the code in order to call that file.
  3. V

    mit_db with modelsim

    hi , i am final year MTECH student , i am doing final year project on ecg qrs detection. For this project i downloaded mit-bih arrythmia database. i want run the simulation in modelsim but i cannot get a way to do that can any one suggest me??
  4. V

    Error Message With VHDL CODE

    library ieee; use ieee.std_logic_1164.all; use IEEE.std_logic_arith.all; entity comp is port(a : in std_logic_vector(7 downto 0); y : out std_logic_vector(7 downto 0)); end comp; architecture dataflow of comp is signal temp: std_logic; begin y<= not(a) + "00000001"; end dataflow...

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