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Recent content by vahidsh

  1. V

    Usb 2.0 host controller

    Hi , I am trying to drive an IC ( usb2.0 host controller) with fpga. The IC i am using, is FT313H from FTDI company. 1.Is there anybody who had been work with FT313H? ( i want to know the maximum rate of transfering of this chip in reality not in theorical ( The theorical is 480 mbps)). 2.what...
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    Generating a pulse with 1ns pulse duration in fpga

    Thank you dear FvM Another question: Is it possible to generate a pulse (by fpga ) with different rise time as an external signal? Rise time is about 4-10 nano second. For example fpga generate some pulse with 4 nano second rise time and then chenge the rise time to 6 or 8 nano second?
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    High speed pulse generator

    Hi dear all, I wanna design a pulse generator that can generate pulses with 1-2 ns duration and 1ns rise/fall time and the repetition rate of pulses is about 1-5KHz( the circuit shold be control for repetition rate for example by fpga the repetition rate of pulse generator can change 1-5 KHz)...
  4. V

    Generating a pulse with 1ns pulse duration in fpga

    Yes i meant 1 nanosecond( rise/fall) time not 1 second. Thank you again. Now based on your guide, i am sure that the pulse 1ns rise/duration/fall ( as an exciter for an circuits with amplitude about 1 volt) is a possible task.
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    Generating a pulse with 1ns pulse duration in fpga

    Thank you for your answer, Really i want to design Pulse Generator(high voltage in order of Kilo volt). The PULSE WIDTH of pulse Generator should be in orders of 1-2 nano second and the Rise time and fall time should be less than 1 second. The repetition of these pulse should be in order of KHz...
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    Generating a pulse with 1ns pulse duration in fpga

    Hi dear all I wanna generate a pulse (1ns duration) in fpga but i am not sure that it is possible because max clock frequency of fpga ( virtex family) is 200MHz . Now please guide me that is it possible to increase max clock freq of fpga by DCM to acchive 1GHz?
  7. V

    vivado synthesis multithreading

    My PC CPU is core-i7 and it has 8 cpu core but synthesisng and other level of my design take too many time to run. And when i monitor the performance of cpus i found that just 4 of them are busy and others are free. I've been read your answer. Did you meant that changing the maximum number of...
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    vivado synthesis multithreading

    Hi dear engineers, I want to khnow about vivado features: 1- In vivado is it possible to synthesis the design with for example 8 CPUs (multithreading)? 2- When i script the " set_param general.maxThreads 8" in TCL console and then synthesis the design, synthesing the design are multithread or...
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    Vivado tcl scripting

    Thank you for your answers dear frinds... I have another question: I want for example change my dcp file or running strategy during runing synthesis or implantation if there is a slack less than 0 . So if there is a slack less than 0 i want change my running strategy. I want do this task...
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    Vivado tcl scripting

    Thank you Could you please give some usefull command that you usually use ? Yes exactly i am newly to use tcl commands and i want to learn some commands that is very very usefull ( in saving time ) . Thank you again.
  11. V

    Vivado tcl scripting

    Hi dear all, I have a question about tcl scripting in vivado. I can not understand why most designer use tcl scripting in vivado?? Where using tcl scripting is useful?(for example all command like "add_bp" or "get_design or ... Seems useless in order of design complexity!!!) And when it is...
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