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Recent content by UUinfini

  1. U

    how to solve this ERC Warning in Virtuoso? (Latchup rule)

    Yes, you are right, I have verified this rule。
  2. U

    how to solve this ERC Warning in Virtuoso? (Latchup rule)

    In fact I don't really understand why, perhaps my MOS are too long. After I have changed the shape, it's ok.
  3. U

    how to solve this ERC Warning in Virtuoso? (Latchup rule)

    In fact there is a problem of the structure. I have solved the problem.Thank you very much.
  4. U

    how to solve this ERC Warning in Virtuoso? (Latchup rule)

    Yes, they are all included in the nwell.
  5. U

    how to solve this ERC Warning in Virtuoso? (Latchup rule)

    It's the white boundry(the two PMOS upper center)
  6. U

    how to solve this ERC Warning in Virtuoso? (Latchup rule)

    Re: how to solve this ERC Warning in Virtuoso? (Latchup rule Hello, I'am also using Cadence and I have got the same problem: Latchup rule LAT3 distance s/d diff pgate net_welltap > 20. I think I have already link the PMOS with VDD and NMOS with the ground. So can you help me solve this...
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