Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
How do I combine 2 digital signals into one?
Say I have signal with "pseudo-random" pulse and another signal with repeating pulse (like clock).. How do I combine those into one digital signal in verilog? Assuming they are both generated with the same clock (minimum pulse width is the same)...
I am working on something where I will have optical communication between two boards. One board will generate specific pulse, another will receive it.
To simplify things, I will have same clock speed on both boards. However, how do I synchronize them to make the receiving FPGA pick up incoming...
I am using Zynq development board, on which I am generating some kind of pulse inside PL. I want to sample this pulse/clock into RAM to be able to read it from software on the PS core (to get sort-of oscilloscope view).
Since my pulse is currently being generated at about 100-200MHz, I guess I...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.