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Recent content by usamaaslam1

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    [SOLVED] Problem with using UART on ML401 board

    Hey Marcel, i have done wat u said. for that my code is working alright wen i run my testbench. but wen i run it oon the ML401 i face problems. kindly check the code and please let me know abt my mistakes
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    [SOLVED] Problem with using UART on ML401 board

    thanks for the reply Marcel. so u need to say that actually if i am using a baud rate of 115200 then according to this my cycle counter value is 348. i need to check for the data at 348 + 16 cycle???? or it should be 348 + 174???? kindly clear me on this. thanks
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    [SOLVED] Problem with using UART on ML401 board

    hi i have written a vhdl code for the transmitter and reciver of UART. I am facing difficulties in getting the synchronization between my PC and ML401. the code is attached. Anyone plz help me in correcting my code. Secondly i want to know how can i send binary value using UART Regards...
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    Problem with the simulation of MULT18X18 in modelsim

    here is the simulation results of the code
  5. U

    Problem with running MODELSIM on windows 7

    can u send me a link from where i can get windows 7 compatible MODELSIM and its licence????? Added after 5 hours 37 minutes: here is the ouput waveform that i am getting in my simulation
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    Problem with running MODELSIM on windows 7

    hi i am facing problem in running modelsim 6.5 on windows 7. the software has been installed properly but the licence is not being recognised by the OS. Has anyone any idea about what to do? Regards Usama
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    Problem with the simulation of MULT18X18 in modelsim

    Here is the testbench that i have written LIBRARY ieee; USE ieee.std_logic_1164.ALL; USE ieee.std_logic_unsigned.all; USE ieee.numeric_std.ALL; ENTITY mult_tb IS END mult_tb; ARCHITECTURE behavior OF mult_tb IS -- Component Declaration for the Unit Under Test (UUT) COMPONENT...
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    Problem with the simulation of MULT18X18 in modelsim

    hi i have written a code to run the multiplier MULT18X18 placed in the libraries of virtex 2. When i simulate the multiplier in modelsim i dont the output. there is always an unknown value shown at the output. i have generated a 1 us clock in the test bench. when synthsized there is a warning...
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    Cordic based implementation of square root

    Hi, i want to implement sqaure root function using CORDIC based implementation. anyone having any idea of such a one in which there is no multiplier or divider.
  10. U

    Shift of 64 entries having 16 bits

    Hi, i have implemented a memory of 16*64 i need 2 shift the values i did it by using case statements sme line are as follow case (addr) 64'd59: begin mem[59] <= `D dinput; mem[60] <= `D mem[59]; mem[61] <= `D mem[60]; mem[62] <= `D...
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    Implementation of 20 Bit Comparator

    HI, i want to implement a 20 bit comparator in verilog. need its most optimized implementation from which i meant that minimal number of gates are used in the implementation. Anyone having any idea about it?
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