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Hi,
In my dctcl file, the constraints for reset are as followings:
set_drive 0 [find port rstb]
set_dont_touch_network [find port rstb]
set_resistance 0 [find net rstb]
set_ideal_net [find net rstb]
In vhdl file, a net connected to the reset of 256 registers is designed as:
reg_clr <= '0'...
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