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Hi,
I am trying to do some study on low noise band gap. By low noise i mean integrated noise of 0.1Hz - 10Hz in the order of less than 10uVrms.
If I have an existing design which has a noise of about 50uVrms, can anyone suggest tricks how to reduce the noise. Chopping is one option, but i am not...
hi all,
i am designing a 3rd order Sigma-Delta ADC for Audio applications. The specs would be something like 18bits, THD<0.1%, OSR = 256.
What will be an estimate of the OTA gain and BW, and why?
Regards.
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