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Recent content by tao_168

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    worst case lib in setup time and best case in hold time ?

    Re: worst case lib in setup time and best case in hold time In ASIC design, usually, there are three provided timing model: worst, typical, and best. Generally, worst setup time is the longest among the setup times in the three models while the best case hold time is the shortest. If your...
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    swapping pmos & nmos in an inverter

    Vout_high ~= Vdd - Vthn; Vout_low ~= |Vthp|. In other words, the output voltage can not fully swing.
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    What are the best LPE tools ?

    Re: The best LPE tools ? calibre rcx is a hierarchical rc extraction tool. It is fast to do the RC extraction. However, all the hierarchical rcx tool have the accuracy problem. You need to turn on the flat mode to get the accurate extracted data, especially for analog design.
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    Opinions on using Cadence Ultrasim for simulation

    Re: C@dence Ultr@sim HSIM is the best in terms of accuracy (use analog mode 3); Ultrasim is probably silmilar to Nanosim. My opinion, up to now, HSIM is the best transistor level simulator to simulate the design which HSPICE has the difficulty.

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