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Recent content by tandy

  1. T

    Sizes of mos in flip-flop and transmission gate

    the size of the transistor will affect the speed and matching, because the existance of non-zero on-resistance and parasitic capacitance. if the minumum size is ok for you , surely ,you can design it because it will save area. Howerver,if the minimum size of the transistors is not fine for your...
  2. T

    CMOS transmission gate

    1. different technologies provide the transistors in different operation voltage. eg. H35B4D3 for 0.35um Process can both provide the standard low voltage transistor (3.3V) and also provide the high voltage transistor that can operated in 20V or even 50V. 2. if you use dual supply, it is ok...
  3. T

    A question about AMS high voltage cmos layout

    would you please upload the layout of the inverter. and I am working on the same case.
  4. T

    What is the Effect of ICMR

    You will get reduced gain. because the transistors are not operated in expected region.
  5. T

    Testing & Measurement of Op -Amp

    additionally, the offset is also a parameter.
  6. T

    How to simulate a comparator circuit?

    Re: comparator circuits examples 1 the input supply voltage range is 1.4-18v, that means the comparator can operated both single supply and dual supplies. for example -9V- 9V is still acceptable. 2 it is the same as the input-impedance measurement of operation amplifier. you can get the...
  7. T

    how to get a ideal comparator from analoglib in cadence

    in the analogLib, No existing ideal comparator, you can find it in ahdlLib. and you need add "veriloga" view in the switch view list to the environment.
  8. T

    Fully differential OPAMP slew rate simulation and monte carlo analysis

    I think it is not easy to cancel the offset in the Monte Carlo Simulation. The component model has been changed to ***mc in the simulation. moreover, the offset is random for each iteration as you mentioned.
  9. T

    Cadence - analogLib - switch component, how does it works

    Re: Cadence - analogLib - switch component, how does it work what do you mean " the control in 'sp1tswitch' part ". if you want to know more setting about the ideal switch in analogLib. you can refer to the discussion: https://www.edaboard.com/threads/42473/ Regards
  10. T

    Best know SAR ADC design

    you can refer to the book "DATA CONVERTER" BY Maloberti, which can be downloaded from the net.
  11. T

    help with ams 0.35 um pads

    I encounter the same problem now . how did you solve it ? many thanks!

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