Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Can you please clarify the role of SL in the memory architecture of neuromorphic devices? I'm confused about whether the term 'source' refers to the source of the transistor or the source of energy. Also, what is the function of the register connected to each SL/BL driver?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
