Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by Syukri

  1. S

    Interview guide for Analog Design engineer

    Yeah...other than that you must know at least the Op-Amp basis design... It's he most basis thing in all analog circuit... Small Signal and large signal anaysis also... There will also look if you got the intuition... Good Luck
  2. S

    Capacitor and guard bar

    At a glance it need a guard band if it's a large area. There are several ways to build capacitor according to the material used. Usually parasitic capacitance will be build within the transistor it self, but the value is small... we need a guard bar coz we are affraid that it will cause...
  3. S

    Lithography process and illumination schemes in the microchip manufacturing process

    Re: lithography process Litoghraphy is the process taken place after the layout drawn..it's where the CAD design shake hand with the silicon surface... well this is classified data.. maybe u can go to any design house web site..more so to fabrication house website.
  4. S

    how should I use the W/L value?

    Effective length is the result expected after the etching process... Spice & most simulator had put certain value set, ucan check this value on the default...and it is varied accordingly with the technologied used. Drawn length...is what we draw on the layout.
  5. S

    I want to learn digital communication systems

    edaboards Hi all... I'm new in communication world...I've just graduated and now I'm working at a ground station of a satelite service company. My post is as a Communication Engineer... The tsk is monitoring the signal communication of the satelite to the earth station and the downlink fibre...
  6. S

    Looking for book and software for mixed signal IC design

    Re: Mixed signal IC design Definitely cadence virtuoso.... The analog part can be in netlist format by schematic driven...and the digital part can be build using verilog coding.... Both different format can communicate each other uisng different hierachy
  7. S

    Links to free layout tools

    Re: free layout tool Go for microwind like given by eng_islam I've started using it when I'm doing my thesis paper... The best part is it uses 0.18µ technology to 0.12µ....that's not all... u can also simulate your layout like it's a schematic... So u check whether it functional or not...
  8. S

    Spectre issue: how to change the default setting of charts?

    Spectre Problem... Hi alll..... I'm using Spectre on analogue Environment.....When the simulation is done, spectre window come out... The matters is that with default configuration...Y axis representing voltages and X for time... How do I chage the Y axis for Voltage Out and X Axis for...
  9. S

    What are the hot keys in Cadence?

    schbindkeys.il location Hi all...I'm such a newbie in using cadance Analog & Mixed Signal Environment. I'm now try to redraw my project (netlist) in my cadence libarary using schematic entry. So I'm glad to know any "hot key" that will make the work simpler. Example : Esc - finish adding...
  10. S

    did anyone know how to draw layout of passive capacitor?

    Check out journal for IPI and MIM capacitor..i think it's better. If u wanted to used parasitic it's influenced by Cox where it's = tox/εox. So it will be very small thus u need large layout for value such as 100p
  11. S

    the external capacitor value

    In term of external capacitor...outside the chip 8µF is considerable. But if u mena it for in chip cap of that value, it's quite large... I think us hould select the best technology to implement the cap to get the low power and low prize. There are several technology to build cap in MOS like...
  12. S

    How to use .measure to test a signal frequency in Hspice?

    Re: How to use .measure to test a signal frequency in Hspice Can you be specific... What signal freq? the output of your circuit ...and what is your circuit?
  13. S

    the external capacitor value

    capacitor is very cheap, furthermore 8µF is acceptable and can be buy at market. In term of performance it only effecting the speed of yourrpoduct where it will be a little bit slower....but it think it will have better output.
  14. S

    Tutorials on designing CMOS comparators

    Re: Comparator Desing paper Maybe i give the picture... Soory if u are not being able to download it..
  15. S

    How to measure hystersis and offset of a latched comparator?

    Re: Latched comparator In order to measure offset and delay : 1. Vref = fix dc voltage = Full swing voltage/2 or usually VDD/2 2. Vin = ramp the input from 0 full voltage swing @ VDD Run the simulation and then u will see the output response that it change from 0V to VDD ( digitally = from...

Part and Inventory Search

Back
Top